Patents by Inventor Jacob D. Haskell

Jacob D. Haskell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4516316
    Abstract: An improved method for forming complementary wells in a substrate is disclosed. A polysilicon layer is applied to the substrate, and the polysilicon layer is doped. An oxidation barrier layer is applied over the doped polysilicon layer. A portion of the doped polysilicon and oxidation layers are removed to expose a well region of one conductivity type in the substrate, and the well is then implanted in the exposed region. The surface of the well, and the polysilicon layer proximate the well beneath the oxidation barrier layer, are then steam oxidized until the lateral desired oxide penetration into the polysilicon layer beneath the oxidation barrier layer has been reached. This forms an oxide masking layer covering and extending beyond the formed well. The remaining oxide barrier layer is then removed to expose a well region of the other conductivity type. This second well region is spaced from the well region already formed by the extended oxide masking layer. The second well is then implanted.
    Type: Grant
    Filed: March 27, 1984
    Date of Patent: May 14, 1985
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Jacob D. Haskell
  • Patent number: 4495025
    Abstract: A process for forming grooves of different depths using a single masking step is presented. In the preferred embodiment of the present invention a photoresist material is used as a single masking layer. The grooves of different types are defined in the masking layer such that the image for a first type groove is narrower in width than the image for a second type groove. The grooves are then formed by subsequent etching steps using conventional etching and anisotropic etching techniques. The grooves are etched to different depths by calculating the proper thickness of a protective layer in relationship to the different groove widths which will allow the deeper groove to be etched without affecting the shallower groove.
    Type: Grant
    Filed: April 6, 1984
    Date of Patent: January 22, 1985
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Jacob D. Haskell
  • Patent number: 4481705
    Abstract: A process for fabricating doped regions in a semiconductor substrate 10 beneath regions of oxidized silicon 21 includes the steps of fabricating a first mask 23 over the substrate 10 except where field regions 21 are desired, introducing p type impurity 30 in to the unmasked regions, oxidizing the silicon substrate 10 except where overlayed by the first mask 23 to form field regions 21, fabricating a second mask 28/23 over the semiconductor substrate 10 except for second field regions, introducing n conductivity type impurity 32 into the second field regions, and oxidizing the substrate to form second field regions 21.
    Type: Grant
    Filed: June 14, 1983
    Date of Patent: November 13, 1984
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Jacob D. Haskell