Patents by Inventor Jacob Eric Nelson

Jacob Eric Nelson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9146746
    Abstract: Devices and methods for providing deterministic execution of multithreaded applications are provided. In some embodiments, each thread is provided access to an isolated memory region, such as a private cache. In some embodiments, more than one private cache are synchronized via a modified MOESI coherence protocol. The modified coherence protocol may be configured to refrain from synchronizing the isolated memory regions until the end of an execution quantum. The execution quantum may end when all threads experience a quantum end event such as reaching a threshold instruction count, overflowing the isolated memory region, and/or attempting to access a lock released by a different thread in the same quantum.
    Type: Grant
    Filed: March 1, 2012
    Date of Patent: September 29, 2015
    Assignee: University of Washington through its Center of Commercialization
    Inventors: Luis Henrique Ceze, Thomas Bergan, Joseph Devietti, Daniel Joseph Grossman, Jacob Eric Nelson
  • Publication number: 20140047452
    Abstract: A computing system for scalable computing on commodity hardware is provided. The computing system includes a first computing device communicatively connected to a second computing device. The first computing device includes a processor, a physical computer-readable medium, and program instructions stored on the physical computer-readable medium and executable by the processor to perform functions. The functions include determining a first task associated with the second computing device and a second task associated with the second computing device are to be executed, assigning execution of the first task and the second task to the processor of the first computing device, generating an aggregated message that includes (i) a first message including an indication corresponding to the execution of the first task and (ii) a second message including an indication corresponding to the execution of the second task, and sending the aggregated message to the second computing device.
    Type: Application
    Filed: March 15, 2013
    Publication date: February 13, 2014
    Applicants: Battelle Memorial Institute, University of Washington through its Center for Commercialization
    Inventors: Luis CEZE, Jacob Eric NELSON, Brandon HOLT, Brandon MYERS, Simon KAHAN, Mark H. OSKIN
  • Publication number: 20120226868
    Abstract: Devices and methods for providing deterministic execution of multithreaded applications are provided. In some embodiments, each thread is provided access to an isolated memory region, such as a private cache. In some embodiments, more than one private cache are synchronized via a modified MOESI coherence protocol. The modified coherence protocol may be configured to refrain from synchronizing the isolated memory regions until the end of an execution quantum. The execution quantum may end when all threads experience a quantum end event such as reaching a threshold instruction count, overflowing the isolated memory region, and/or attempting to access a lock released by a different thread in the same quantum.
    Type: Application
    Filed: March 1, 2012
    Publication date: September 6, 2012
    Applicant: University of Washington through its Center for Commercialization
    Inventors: Luis Henrique Ceze, Thomas Bergan, Joseph Devietti, Daniel Joseph Grossman, Jacob Eric Nelson