Abstract: A power supply system for providing power to a powered device over a communication link includes a power supply device capable of supporting an AC disconnect-detect function. The power supply device has a controller, an output port coupled to the communication link, and a bipolar junction transistor (BJT) controlled by the controller to provide power to the output port. The BJT may be turned off to present a high impedance required to support the AC disconnect-detection function.

Abstract: A novel system and methodology for supplying power over a communication cable, such as an Ethernet cable, using power distribution circuitry for controlling power distribution between wires or pairs of wires in the communication cable. The power distribution circuitry may control distribution of current among wires or pairs of wires in the communication cable. In particular, balance of current among the wires or pairs of wires may be provided.

Abstract: A novel system for providing power over the Ethernet includes a current limit circuit for preventing an output current from exceeding a current threshold set at a prescribed level, and a foldback circuit for reducing the current threshold when an output voltage is lower than a prescribed voltage value. The foldback circuit may be controlled to operate in a high-power mode to increase the current threshold above the prescribed level.

Abstract: Novel system and methodology for determining resistance of wires in a communication cable having at least two pairs of wires used for providing power from a power supply device to a powered device. A measuring mechanism may determine DC resistance of the wires before the power supply device applies power to the communication cable.

Abstract: Circuits and methods for detecting the presence of a powered device in a powered network connection and removing power from the powered network connection when no powered device is present are disclosed. The circuits and methods involve applying a time-varying voltage signal into an analog amplifier circuit that converts the voltage into a current indicative of the impedance of the connection. The analog amplifier circuit may be implemented with a dual-output trans-conductance amplifier that provides a digital voltage to indicate the removal of the powered device from the powered network connection.

Abstract: A power supply system for providing power to a powered device over a communication link includes a power supply device capable of supporting an AC disconnect-detect function. The power supply device has a controller, an output port coupled to the communication link, and a bipolar junction transistor (BJT) controlled by the controller to provide power to the output port. The BJT may be turned off to present a high impedance required to support the AC disconnect-detection function.

Abstract: A Power over Ethernet (PoE) system having a Power Sourcing Equipment (PSE) and a Powered Device (PD) configured for interacting over four pairs of wire provided for supplying power from the PSE to the PD. The PSE and the PD are configured to perform separate PD classification procedures over first and second 2-pair sets to support PoE operations that are not defined by the IEEE 802.3af standard.

Abstract: A novel system and methodology for supplying power over a communication cable, such as an Ethernet cable, using power distribution circuitry for controlling power distribution between wires or pairs of wires in the communication cable. The power distribution circuitry may control distribution of current among wires or pairs of wires in the communication cable. In particular, balance of current among the wires or pairs of wires may be provided.

Abstract: A novel system for providing power over the Ethernet includes a current limit circuit for preventing an output current from exceeding a current threshold set at a prescribed level, and a foldback circuit for reducing the current threshold when an output voltage is lower than a prescribed voltage value. The foldback circuit may be controlled to operate in a high-power mode to increase the current threshold above the prescribed level.

Abstract: Novel system and methodology for determining resistance of wires in a communication cable having at least two pairs of wires used for providing power from a power supply device to a powered device. A measuring mechanism may determine DC resistance of the wires before the power supply device applies power to the communication cable.

Abstract: Circuits and methods for detecting the presence of a powered device in a powered network connection and removing power from the powered network connection when no powered device is present are disclosed. The circuits and methods involve applying a time-varying voltage signal into an analog amplifier circuit that converts the voltage into a current indicative of the impedance of the connection. The analog amplifier circuit may be implemented with a dual-output trans-conductance amplifier that provides a digital voltage to indicate the removal of the powered device from the powered network connection.

Abstract: A clock signal generator produces an output clock signal having signal pulse timing adjustable with a resolution of P seconds. To produce a clock signal having an average frequency that is other than 1/k*P, where k is an integer, the clock signal generator occasionally adjusts the period between successive pulses of the clock signal.

Abstract: A clock signal generator produces an output clock signal having signal pulse timing adjustable with a resolution of P seconds. To produce a clock signal having an average frequency that is other than 1/k*P, where k is an integer, the clock signal generator occasionally adjusts the period between successive pulses of the clock signal.

Abstract: A random access memory (RAM) having N addressable storage locations is addressed by input data specifying a signal delay, and the RAM reads out control data controlling the delay of a delay circuit. A linearization system automatically adjusts the value of the control data stored at each of the RAM's N addresses so that the delay provided by the delay circuit is a linear function of the value of the input data. The linearization system provides two periodic reference signals (“beat” and “clock”) wherein the period PB of the beat signal and the period PC of the clock signal are related by the expression PB=PC(N+1)/N. The linearization system iteratively adjusts the control data stored at each RAM address so that when the RAM continuously reads out the control data stored at the Kth RAM address, the Kth edge of the beat signal and every Nth edge thereafter substantially coincides with an edge of the delay circuit output signal.