Patents by Inventor Jacob L. Hiester

Jacob L. Hiester has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250179680
    Abstract: Examples are disclosed herein that relate to characterizing a plating gap between an anode structure and a cathode in an electrodeposition tool. One example provides a fixture for characterizing a spacing of a plating gap of an electrodeposition tool. The fixture comprises a substrate holder interface configured to contact a seal of a substrate holder of the electrodeposition tool. The fixture further comprises a protrusion comprising a contact surface configured to contact the anode structure of the electrodeposition tool during a plating gap characterization process. A thickness dimension comprising a distance between a plane of the substrate holder interface and the contact surface of the protrusion corresponds to a preselected plating gap spacing.
    Type: Application
    Filed: February 28, 2023
    Publication date: June 5, 2025
    Inventors: Jared HERR, Jacob L. HIESTER, Chad M. HOSACK, Gabriel GRAHAM, Marc QUAGLIO, Robert RASH, James FORTNER, Jason Gordon GALGINAITIS, Kevin BERTSCH
  • Publication number: 20240353217
    Abstract: A sensor disc configured to measure a gap between a first structure and a second structure in a processing chamber of a substrate processing system includes an upper surface, at least one first capacitive sensor arranged on the upper surface of the sensor disc that is configured to generate a first measurement signal indicative of a first distance between the upper surface of the sensor disc and the first structure, a lower surface, and at least one second capacitive sensor arranged on the lower surface of the sensor disc that is configured to generate a second measurement signal indicative of a second distance between the lower surface of the sensor disc and the second structure.
    Type: Application
    Filed: August 2, 2022
    Publication date: October 24, 2024
    Inventors: Jacob L. HIESTER, Richard BLANK
  • Publication number: 20240234106
    Abstract: A system comprises a pedestal and a controller. The pedestal is arranged below a showerhead in a processing chamber and includes at least three electrodes to clamp a substrate to the pedestal during processing. The controller is configured to measure a pedestal-to-showerhead gap and at least one of a magnitude and a direction of a relative tilt between the pedestal and the showerhead by sensing impedances between the at least three electrodes and the showerhead.
    Type: Application
    Filed: March 11, 2022
    Publication date: July 11, 2024
    Inventors: Karl Frederick LEESER, Richard BLANK, Jacob L. HIESTER
  • Publication number: 20240136161
    Abstract: A system comprises a pedestal and a controller. The pedestal is arranged below a showerhead in a processing chamber and includes at least three electrodes to clamp a substrate to the pedestal during processing. The controller is configured to measure a pedestal-to-showerhead gap and at least one of a magnitude and a direction of a relative tilt between the pedestal and the showerhead by sensing impedances between the at least three electrodes and the showerhead.
    Type: Application
    Filed: March 11, 2022
    Publication date: April 25, 2024
    Inventors: Karl Frederick LEESER, Richard BLANK, Jacob L. HIESTER
  • Publication number: 20230395410
    Abstract: A method for calibration including determining a temperature induced offset in a pedestal of a process module under a temperature condition for a process. The method includes delivering a wafer to the pedestal of the process module by a robot, and detecting an entry offset. The method includes rotating the wafer over the pedestal by an angle. The method includes removing the wafer from the pedestal by the robot and measuring an exit offset. The method includes determining a magnitude and direction of the temperature induced offset using the entry offset and exit offset.
    Type: Application
    Filed: August 11, 2023
    Publication date: December 7, 2023
    Inventors: Jacob L. Hiester, Richard Blank, Peter Thaulad, Paul Konkola
  • Patent number: 11742229
    Abstract: A method for calibration including determining a temperature induced offset in a pedestal of a process module under a temperature condition for a process. The method includes delivering a wafer to the pedestal of the process module by a robot, and detecting an entry offset. The method includes rotating the wafer over the pedestal by an angle. The method includes removing the wafer from the pedestal by the robot and measuring an exit offset. The method includes determining a magnitude and direction of the temperature induced offset using the entry offset and exit offset.
    Type: Grant
    Filed: December 16, 2021
    Date of Patent: August 29, 2023
    Assignee: Lam Research Corporation
    Inventors: Jacob L. Hiester, Richard Blank, Peter Thaulad, Paul Konkola
  • Publication number: 20230245853
    Abstract: A circuit tuning radio frequency (RF) power. The circuit includes a low to mid frequency (LF/HF) tuning circuit including a variable LF/MF capacitor coupled in series with an LF/MF inductor. The LF/MF tuning circuit is coupled between ground and a common node configured to receive an RF input. The circuit includes a high frequency (HF) tuning circuit coupled in parallel to the LF/MF tuning circuit between ground and the common node. The HF tuning circuit includes a variable HF capacitor coupled in series with an HF inductor. Cross parallel isolation occurs between the LF/MF inductor of the LF/MF tuning circuit and the HF inductor of the HF tuning circuit when adjusting the variable LF/MF capacitor or variable HF capacitor.
    Type: Application
    Filed: February 24, 2023
    Publication date: August 3, 2023
    Inventors: Eller Y. Juco, Karl Frederick Leeser, David French, Sunil Kapoor, Aaron Bingham, David Alan Metz, Brett Herzig, Jacob L. Hiester, Brian Knight
  • Patent number: 11594397
    Abstract: A circuit tuning radio frequency (RF) power. The circuit includes a low to mid frequency (LF/HF) tuning circuit including a variable LF/MF capacitor coupled in series with an LF/MF inductor. The LF/MF tuning circuit is coupled between ground and a common node configured to receive an RF input. The circuit includes a high frequency (HF) tuning circuit coupled in parallel to the LF/MF tuning circuit between ground and the common node. The HF tuning circuit includes a variable HF capacitor coupled in series with an HF inductor. Cross parallel isolation occurs between the LF/MF inductor of the LF/MF tuning circuit and the HF inductor of the HF tuning circuit when adjusting the variable LF/MF capacitor or variable HF capacitor.
    Type: Grant
    Filed: March 17, 2021
    Date of Patent: February 28, 2023
    Assignee: Lam Research Corporation
    Inventors: Eller Y. Juco, Karl Frederick Leeser, David French, Sunil Kapoor, Aaron Bingham, David Alan Metz, Brett Herzig, Jacob L. Hiester, Brian Knight
  • Publication number: 20220108902
    Abstract: A method for calibration including determining a temperature induced offset in a pedestal of a process module under a temperature condition for a process. The method includes delivering a wafer to the pedestal of the process module by a robot, and detecting an entry offset. The method includes rotating the wafer over the pedestal by an angle. The method includes removing the wafer from the pedestal by the robot and measuring an exit offset. The method includes determining a magnitude and direction of the temperature induced offset using the entry offset and exit offset.
    Type: Application
    Filed: December 16, 2021
    Publication date: April 7, 2022
    Inventors: Jacob L. Hiester, Richard Blank, Peter Thaulad, Paul Konkola
  • Patent number: 11239100
    Abstract: A method for calibration including determining a temperature induced offset in a pedestal of a process module under a temperature condition for a process. The method includes delivering a wafer to the pedestal of the process module by a robot, and detecting an entry offset. The method includes rotating the wafer over the pedestal by an angle. The method includes removing the wafer from the pedestal by the robot and measuring an exit offset. The method includes determining a magnitude and direction of the temperature induced offset using the entry offset and exit offset.
    Type: Grant
    Filed: May 8, 2020
    Date of Patent: February 1, 2022
    Assignee: Lam Research Corporation
    Inventors: Jacob L. Hiester, Richard Blank, Peter Thaulad, Paul Konkola
  • Publication number: 20210202208
    Abstract: A circuit tuning radio frequency (RF) power. The circuit includes a low to mid frequency (LF/HF) tuning circuit including a variable LF/MF capacitor coupled in series with an LF/MF inductor. The LF/MF tuning circuit is coupled between ground and a common node configured to receive an RF input. The circuit includes a high frequency (HF) tuning circuit coupled in parallel to the LF/MF tuning circuit between ground and the common node. The HF tuning circuit includes a variable HF capacitor coupled in series with an HF inductor. Cross parallel isolation occurs between the LF/MF inductor of the LF/MF tuning circuit and the HF inductor of the HF tuning circuit when adjusting the variable LF/MF capacitor or variable HF capacitor.
    Type: Application
    Filed: March 17, 2021
    Publication date: July 1, 2021
    Inventors: Eller Y. Juco, Karl Frederick Leeser, David French, Sunil Kapoor, Aaron Bingham, David Alan Metz, Brett Herzig, Jacob L. Hiester, Brian Knight
  • Patent number: 10991550
    Abstract: A circuit tuning radio frequency (RF) power. The circuit includes a low to mid frequency (LF/HF) tuning circuit including a variable LF/MF capacitor coupled in series with an LF/MF inductor. The LF/MF tuning circuit is coupled between ground and a common node configured to receive an RF input. The circuit includes a high frequency (HF) tuning circuit coupled in parallel to the LF/MF tuning circuit between ground and the common node. The HF tuning circuit includes a variable HF capacitor coupled in series with an HF inductor. Cross parallel isolation occurs between the LF/MF inductor of the LF/MF tuning circuit and the HF inductor of the HF tuning circuit when adjusting the variable LF/MF capacitor or variable HF capacitor.
    Type: Grant
    Filed: September 4, 2018
    Date of Patent: April 27, 2021
    Assignee: Lam Research Corporation
    Inventors: Eller Y. Juco, Karl Frederick Leeser, David French, Sunil Kapoor, Aaron Bingham, David Alan Metz, Brett Herzig, Jacob L. Hiester, Brian Knight
  • Publication number: 20200273731
    Abstract: A method for calibration including determining a temperature induced offset in a pedestal of a process module under a temperature condition for a process. The method includes delivering a wafer to the pedestal of the process module by a robot, and detecting an entry offset. The method includes rotating the wafer over the pedestal by an angle. The method includes removing the wafer from the pedestal by the robot and measuring an exit offset. The method includes determining a magnitude and direction of the temperature induced offset using the entry offset and exit offset.
    Type: Application
    Filed: May 8, 2020
    Publication date: August 27, 2020
    Inventors: Jacob L. Hiester, Richard Blank, Peter Thaulad, Paul Konkola
  • Patent number: 10651065
    Abstract: A method for calibration including determining a temperature induced offset in a pedestal of a process module under a temperature condition for a process. The method includes delivering a wafer to the pedestal of the process module by a robot, and detecting an entry offset. The method includes rotating the wafer over the pedestal by an angle. The method includes removing the wafer from the pedestal by the robot and measuring an exit offset. The method includes determining a magnitude and direction of the temperature induced offset using the entry offset and exit offset.
    Type: Grant
    Filed: June 5, 2018
    Date of Patent: May 12, 2020
    Assignee: Lam Research Corporation
    Inventors: Jacob L. Hiester, Richard Blank, Peter Thaulad, Paul Konkola
  • Publication number: 20200075289
    Abstract: A circuit tuning radio frequency (RF) power. The circuit includes a low to mid frequency (LF/HF) tuning circuit including a variable LF/MF capacitor coupled in series with an LF/MF inductor. The LF/MF tuning circuit is coupled between ground and a common node configured to receive an RF input. The circuit includes a high frequency (HF) tuning circuit coupled in parallel to the LF/MF tuning circuit between ground and the common node. The HF tuning circuit includes a variable HF capacitor coupled in series with an HF inductor. Cross parallel isolation occurs between the LF/MF inductor of the LF/MF tuning circuit and the HF inductor of the HF tuning circuit when adjusting the variable LF/MF capacitor or variable HF capacitor.
    Type: Application
    Filed: September 4, 2018
    Publication date: March 5, 2020
    Inventors: Eller Y. Juco, Karl Frederick Leeser, David French, Sunil Kapoor, Aaron Bingham, David Alan Metz, Brett Herzig, Jacob L. Hiester, Brian Knight
  • Publication number: 20190172738
    Abstract: A method for calibration including determining a temperature induced offset in a pedestal of a process module under a temperature condition for a process. The method includes delivering a wafer to the pedestal of the process module by a robot, and detecting an entry offset. The method includes rotating the wafer over the pedestal by an angle. The method includes removing the wafer from the pedestal by the robot and measuring an exit offset. The method includes determining a magnitude and direction of the temperature induced offset using the entry offset and exit offset.
    Type: Application
    Filed: June 5, 2018
    Publication date: June 6, 2019
    Inventors: Jacob L. Hiester, Richard Blank, Peter Thaulad, Paul Konkola
  • Publication number: 20170040205
    Abstract: Disclosed herein, a contact pad for use on a robot arm in transfer chamber in a wafer processing tool is provided, comprising an elastomer body and a high hardness powder doping a surface of the elastomer body.
    Type: Application
    Filed: July 26, 2016
    Publication date: February 9, 2017
    Inventors: Jacob L. Hiester, Richard M. Blank, Tyson L. Ringold, Peter J. Woytowitz, Mohsen S. Salek