Patents by Inventor Jacob M. Scheer

Jacob M. Scheer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for manufacturing an electronic assembly; an electronic assembly, a cover and a substrate
    Patent number: 7884289
    Abstract: The present invention relates to a method for manufacturing an electronic assembly (50) comprising an electronic component, a cavity and a substrate which method comprises; —providing an electronic component (10) having a first pattern with a substantially closed configuration; —providing a cover (18) on a surface of the electronic component, which cover together with said surface defines a cavity (20), the closed configuration of the first pattern substantially enclosing the cover at said surface; —providing a substrate (30) having a second pattern with a substantially closed configuration, which closed configuration at least partially corresponds to the closed configuration of the first pattern and comprises a solder pad; —disposing solder material at the solder pad; —positioning the electronic component and the substrate so as to align both the substantially closed configurations of the first and second pattern, while the substrate supports a top surface (28) of the cover; —reflow-soldering the solder mate
    Type: Grant
    Filed: April 11, 2007
    Date of Patent: February 8, 2011
    Assignee: NXP B.V.
    Inventors: Johannes W. Weekamp, Cornelis Slob, Jacob M. Scheer, Freerk E. Van Straten
  • METHOD FOR MANUFACTURING AN ELECTRONIC ASSEMBLY; AN ELECTRONIC ASSEMBLY, A COVER AND A SUBSTRATE
    Publication number: 20090159331
    Abstract: The present invention relates to a method for manufacturing an electronic assembly (50) comprising an electronic component, a cavity and a substrate which method comprises; —providing an electronic component (10) having a first pattern with a substantially closed configuration; —providing a cover (18) on a surface of the electronic component, which cover together with said surface defines a cavity (20), the closed configuration of the first pattern substantially enclosing the cover at said surface; —providing a substrate (30) having a second pattern with a substantially closed configuration, which closed configuration at least partially corresponds to the closed configuration of the first pattern and comprises a solder pad; —disposing solder material at the solder pad; —positioning the electronic component and the substrate so as to align both the substantially closed configurations of the first and second pattern, while the substrate supports a top surface (28) of the cover; —reflow-soldering the solder mate
    Type: Application
    Filed: April 11, 2007
    Publication date: June 25, 2009
    Applicant: NXP B.V.
    Inventors: Johannes W. Weekamp, Cornelis Slob, Jacob M. Scheer, Freerk E. Van Straten