Abstract: The present invention provides a unified layer for Plug and Play (PnP) components and power management components while relieving device drivers from system-level complexities associated with implementing PnP and/or power management functionality. The layer operates at a level between low-level device drivers and more complex operating system tasks. The subject invention simplifies designing device drivers having proper power management support by creating an infrastructure that allows a device driver to operate within a driver framework or model and without having to process Plug-and-Play or Power Management I/O Request Packets (IRPs) directly.

Abstract: The present invention relates to a system and methodology to facilitate negotiation, assignment, and management of interrupt resources in a flexible and dynamic manner. An interrupt arbitration system is provided to process at least one request associated with an interrupt resource, wherein the request includes at least two dimensions related to an interrupt and an interrupt service component. An arbiter processes the request and returns a subset of interrupt resource ranges in view of available system resources. This multi-dimensional mapping of resources enables coordination across resource pools, processors, buses, and/or other components while mitigating possible run-time problems attributed to one-dimensional systems that may find that suitable resources are unavailable.

Abstract: Mechanisms are disclosed herein that manage operations in virtual machine environments. A first partition can have a proxy driver object corresponding to a driver object in a second partition. The driver object can control a physical device, but because of the proxy driver object, the first partition can retain some measure of control over the physical device. The driver object can be surrounded by a first filter object beneath it, and a second filter object above it. The first filter object can provide interfaces to the driver object so that the driver object can perform various bus-related functionalities; and, the second filter object can receive redirected instructions from the first partition and provide them to the driver object, and intercept any instructions originating from within the second partition, such that if these instructions are inconsistent with policies set in the first partition, they can be manipulated.

Abstract: A system and method for an ejection failure mechanism is provided. The system receives a request to eject an ejectable resource, and, provides information associated with a failure of the ejection of the ejectable resource, if ejection of the ejectable resource is unsuccessful. The system thus provides a deterministic mechanism through which information associated with failure of the ejection of an ejectable resource can be communicated. As such, an initiator of the request to eject can receive information associated with a cause of the ejection failure.

Abstract: A system for adding multiple GPE blocks (in addition to the system/root GPE block device) to a computing system by creating a device entry in the ACPI namespace, and using a _CRS object to describe the system resources consumed by the device is described. The GPE block device may then access associated hardware devices through a well known mechanism (either I/O or Memory Mapped accesses). By creating additional GPE block devices within the ACPI namespace, general purpose events may be delivered using more traditional hardware interrupt mechanisms than with existing systems (e.g., wiring GPE blocks together). Moreover, by putting GPE block devices in the ACPI namespace, hardware components having hardware registers may be “hot plugged” to the computing system.

Abstract: The present invention provides a unified layer for Plug and Play (PnP) components and power management components while relieving device drivers from system-level complexities associated with implementing PnP and/or power management functionality. The layer operates at a level between low-level device drivers and more complex operating system tasks. The subject invention simplifies designing device drivers having proper power management support by creating an infrastructure that allows a device driver to operate within a driver framework or model and without having to process Plug-and-Play or Power Management I/O Request Packets (IRPs) directly.

Abstract: The present invention provides a unified layer for Plug and Play (PnP) components and power management components while relieving device drivers from system-level complexities associated with implementing PnP and/or power management functionality. The layer operates at a level between low-level device drivers and more complex operating system tasks. The subject invention simplifies designing device drivers having proper power management support by creating an infrastructure that allows a device driver to operate within a driver framework or model and without having to process Plug-and-Play or Power Management I/O Request Packets (IRPs) directly.

Abstract: A method and system that enables customized computer machines to be more readily developed by removing the function of resource translation out of the hardware abstraction layer (HAL). A machine manufacturer describes a machine in firmware, such as accordance with the Advanced Configuration and Power Interface (ACPI) specification, using ACPI machine language (AML). Operating system components such as a Plug and Play (PnP) manager in the kernel, in conjunction with an ACPI driver, interpret the description information and locate resources (bus bridges) for which translation is needed. For any arbitrary bus architecture or CPU to PCI bridge implementation that can be expressed, e.g., in ACPI firmware, the invention provides a translator external to the HAL. In one implementation, a PnP driver communicates with the ACPI driver and various drivers in driver stacks via I/O request packets (IRPs) to look for resource translators.

Abstract: A computing device has first and second virtual machines (VMs) and a resource assigned to the first VM. Each access request for the resource is forwarded thereto until the first VM is to be saved or migrated. Thereafter, each access request is forwarded to a holding queue. When the resource has acted upon all access requests forwarded thereto, the resource is reassigned to the second VM, and each access request at the holding queue is forwarded to the second VM and then the resource. Thus, all access requests for the resource are acted upon by the resource even after the resource is removed from the first VM and assigned to the second VM, and the save or migrate of the first VM can thereafter be completed.

Abstract: A computing device has a hardware device employed to provide a hardware service to the computing device and a plurality of virtual machines including a host virtual machine (VM-H) to which the hardware device is assigned, and a client virtual machine (VM-C) that can consume the hardware service by way of the VM-H. The VM-C includes an emulating stack and an enlightened stack. The emulating stack interfaces an application requesting the hardware service with a trap in a virtualization layer of the computing device which re-directs the request to the VM-H. The enlightened stack interfaces the application with the VM-H and bypasses the virtualization layer. The emulating stack includes a shunt driver that shunts to the enlightened stack each request from the application directed to the emulating stack.

Abstract: A computing device has a virtual machine bus (VM bus) operable in a pipe mode where all incoming data written to the VM bus from a source is passed through to be read from the VM bus by a sink, and a plurality of instantiated virtual machines (VMs). Each VM hosts an instance of an operating system upon an application may be instantiated. Each VM includes a computing object for issuing a call to a component object of another VM, and a VM bus system object for receiving the call and communicating same to a VM bus system object of the another VM by way of the VM bus. The VM bus system object is also for receiving the call from the VM bus system object of the another VM by way of the VM bus and for communicating the received call to the computing object.

Abstract: A component, system and method for simulation of a PCI device's memory-mapped I/O register(s) are provided. The PCI simulation component has an initialization component, a configuration space simulator and a memory-mapped I/O space simulator. The initialization component can claim an amount of memory by modifying the amount of memory that an operating system has available to it. The initialization component further identifies to the operating system that at least some of the claimed memory resides on a PCI bus. The configuration space simulator causes the operating system to accept that the simulated PCI device is present in the system. The memory-mapped I/O space simulator simulates device and can comprise can comprise a thread that monitors the simulated memory-mapped I/O registers for a change in order to simulate behavior of the simulated PCI device.

Abstract: A method and system are provided for integrating partitions in a virtual machine environment. Specifically, a partition bus is provided, where the partition bus operatively connects partitions in such a way that it functions as a data transport mechanism allowing for data transfer and device sharing between partitions. The partition bus relies on virtualizing software in order to establish itself and to establish channels of communication between partitions and to inject interrupts to partitions where it is appropriate to do so. Furthermore, the partition bus employs such mechanisms ring buffers, transfer pages, and memory map changes to transfer information (requests and data). Furthermore, it uses policy agents to decide when information should be transferred or when devices should be shared among partitions. Lastly, it employs various mechanisms to ensure smooth integration between partitions, which includes remote services that have proxy devices and device versioning functionalities.

Abstract: A method of managing resources in a host computer includes generating a virtual service provider in two different computer partitions and linking them in a serial manner. The virtual service providers are associated with a computer resource. Virtual service clients in different partitions may use the virtual service provider software to access the related computer resources. The virtual service providers provide a transparent interface to the associated hardware. Virtual service clients can use the combination of series computer resource functions or can access the a lesser number of the series connected virtual service providers. Fault tolerance can be built into the scheme using multiple virtual service providers located in different partitions accessible to virtual service clients using a failover control technique.

Abstract: A component, system and method for simulation of a PCI device's memory-mapped I/O register(s) are provided. The PCI simulation component has an initialization component, a configuration space simulator and a memory-mapped I/O space simulator. The initialization component can claim an amount of memory by modifying the amount of memory that an operating system has available to it. The initialization component further identifies to the operating system that at least some of the claimed memory resides on a PCI bus. The configuration space simulator causes the operating system to accept that the simulated PCI device is present in the system. The memory-mapped I/O space simulator simulates behavior of a simulated PCI device and can comprise can comprise a thread that monitors the simulated memory-mapped I/O registers for a change in order to simulate behavior of the simulated PCI device.

Abstract: Transitioning to a suspend to RAM sleeping state while also protecting against power losses while sleeping is provided. System state context data is saved to non-volatile storage and components in the computer system prepare to transition to a suspend to disc sleeping. A transition to the suspend to RAM sleeping state is then effected. Alternatively, after the system context is saved and the components are prepared to transition, the system may wake to a working state. The components may be directed to prepare for transitioning to a suspend to RAM sleeping state, and then the BIOS may be directed to execute the transition. In either embodiment, if power to the system is lost while the system is in the suspend to RAM system state, then the system may resume to a working state by reading the context file stored to non-volatile storage.

Abstract: The subject invention relates to systems and methods for automatic recovery from errors in a computing environment. A system is provided to facilitate failure recovery in the computing system. The system includes at least one driver component that enumerates at least one layer of a driver stack. A module associated with the driver component requests re-enumeration of the driver stack upon detection of an error in the computing system. When an error is detected by a driver or operating system component, a protocol can be established whereby a new copy of the driver's stack or system resources is re-enumerated in parallel to existing resources that may be in an unknown or error state. The new copy of the stack may allow the driver to become operational in lieu of the previous stack which can be reclaimed for other system uses over time.

Abstract: A method and system for adaptively throttling a computer is provided. Prior CPU utilization is calculated when a CPU enters an idle state. If the prior CPU utilization warrants a change in the CPU performance level, an appropriate CPU performance level is calculated. Policies, including thermal policies and battery charge policies, may be applied to increase or decrease the appropriate CPU performance level. If prior CPU utilization and/or policies dictate a different CPU performance level, the CPU performance level is changed.

Abstract: A mechanism for simulating the existence of hardware in a configuration and power management system is described. In one aspect, a simulator interfaces with the configuration and power management system to generate simulated events. In another aspect, accesses to hardware registers are simulated by registering the simulator with the configuration and power management system to handle accesses to a simulated hardware device. A component within the configuration and power management system may define the simulated hardware device such that accesses to the simulated hardware device occur with respect to a defined I/O space.

Abstract: A method and system that enables customized computer machines to be more readily developed by removing the function of resource translation out of the hardware abstraction layer (HAL). A machine manufacturer describes a machine in firmware, such as accordance with the Advanced Configuration and Power Interface (ACPI) specification, using ACPI machine language (AML). Operating system components such as a Plug and Play (PnP) manager in the kernel, in conjunction with an ACPI driver, interpret the description information and locate resources (bus bridges) for which translation is needed. For any arbitrary bus architecture or CPU to PCI bridge implementation that can be expressed, e.g., in ACPI firmware, the invention provides a translator external to the HAL. In one implementation, a PnP driver communicates with the ACPI driver and various drivers in driver stacks via I/O request packets (IRPs) to look for resource translators.