Abstract: A system for controlling flow of fluid for hydraulic fracturing includes a pump configured to pump fluid down a wellbore penetrating a subterranean formation; a valve disposed between the pump and the wellbore; a sensor configured to monitor a measurand of the hydraulic fracturing; and a controller configured to receive real time data of the measurand from the sensor, and control a degree of openness of the valve in real time based on the data and a valve sequencing algorithm.

Abstract: A system for controlling flow of fluid for hydraulic fracturing includes a pump configured to pump fluid down a wellbore penetrating a subterranean formation; a valve disposed between the pump and the wellbore; a sensor configured to monitor a measurand of the hydraulic fracturing; and a controller configured to receive real time data of the measurand from the sensor, and control a degree of openness of the valve in real time based on the data and an adaptive parameter.

Abstract: The present disclosure is generally directed to broadcasting bank option information to one or more memory banks in a memory device. In some instances, bank option information can be associated with a trimming operation for a memory bank. Each memory bank in a memory array can receive bank option information on a per bank basis. The bank option information may be broadcast before, during, or after the broadcast of a line repair information (e.g., column repair information). The bank option information enables the operation of each memory bank to be uniquely improved or optimized.

Abstract: The present disclosure is generally directed to repair solutions for a semiconductor memory device and linking some of the repair solutions together. When fuse bus addresses (FBAs) are generated and transmitted to one or more fuse arrays, a start of a link loading operation is detected based on a respective FBA. The information that is stored at the fuses corresponding to the respective FBA is output for the respective FBA and for one or more subsequent FBAs that are included in the link loading operation. Thus, the same information is output during the link loading operation. Prior to the start of the link loading operation, and/or at the end of the link loading operation, information received from the one or more fuse arrays can be output.

Abstract: Apparatuses and techniques for broadcasting a host-controlled parameter to circuitry distributed at a local-bank level for usage-based-disturbance mitigation are described. In an example aspect, a memory device includes usage-based-disturbance circuitry distributed at a local-bank level and bus circuitry. The bus circuitry broadcasts information provided by a memory controller to the usage-based-disturbance circuitry. The bus circuitry provides a means of efficient communication between the mode controller and the usage-based-disturbance circuitry to enable the memory controller to control some aspect of the usage-based-disturbance mitigation operation performed by the usage-based-disturbance circuitry. This means of communication enables the memory controller to dynamically adjust an operation and/or performance of the memory device with respect to usage-based-disturbance mitigation.

Abstract: An example apparatus may perform concurrent threshold voltage compensation in a memory array with distributed row redundancy. The example apparatus may include a memory cell array having a mat having a plurality of row sections that each include respective prime memory cell rows and a respective redundant memory cell row. The example apparatus may further include a row decoder configured to receive an access command and a prime row address. The row decoder may be configured to, in response to a determination that the prime row address matches a defective prime row address, concurrently initiate a threshold voltage compensation operation on both of a prime row of the respective plurality of prime rows of memory cells of a first row section of the plurality of row sections corresponding to the prime row address and the respective redundant row of a second row section of the plurality of row sections.

Abstract: An example apparatus may perform concurrent threshold voltage compensation in a memory array with distributed row redundancy. The example apparatus may include a memory cell array having a mat having a plurality of row sections that each include respective prime memory cell rows and a respective redundant memory cell row. The example apparatus may further include a row decoder configured to receive an access command and a prime row address. The row decoder may be configured to, in response to a determination that the prime row address matches a defective prime row address, concurrently initiate a threshold voltage compensation operation on both of a prime row of the respective plurality of prime rows of memory cells of a first row section of the plurality of row sections corresponding to the prime row address and the respective redundant row of a second row section of the plurality of row sections.

Abstract: An example apparatus may perform concurrent threshold voltage compensation in a memory array with distributed row redundancy. The example apparatus may include a row decoder configured to configured to, in response to a determination that the prime row address matches a defective prime row address, concurrently initiate a threshold voltage compensation operation on both of a prime row of the respective plurality of prime rows of memory cells of a first row section of the plurality of row sections corresponding to the prime row address and the respective redundant row of a second row section of the plurality of row sections. The row decoder may be further configured to stop an access operation associated with the prime row from proceeding based on a comparison of subset of match signals from either the first or second pluralities of row sections.

Abstract: An example apparatus may perform concurrent threshold voltage compensation in a memory array with distributed row redundancy. The example apparatus may include a memory cell array having a mat having a plurality of row sections that each include respective prime memory cell rows and a respective redundant memory cell row. The example apparatus may further include a row decoder configured to receive an access command and a prime row address. The row decoder may be configured to, in response to a determination that the prime row address matches a defective prime row address, concurrently initiate a threshold voltage compensation operation on both of a prime row of the respective plurality of prime rows of memory cells of a first row section of the plurality of row sections corresponding to the prime row address and the respective redundant row of a second row section of the plurality of row sections.

Abstract: An example apparatus may perform concurrent threshold voltage compensation in a memory array with distributed row redundancy. The example apparatus may include a row decoder configured to configured to, in response to a determination that the prime row address matches a defective prime row address, concurrently initiate a threshold voltage compensation operation on both of a prime row of the respective plurality of prime rows of memory cells of a first row section of the plurality of row sections corresponding to the prime row address and the respective redundant row of a second row section of the plurality of row sections. The row decoder may be further configured to stop an access operation associated with the prime row from proceeding based on a comparison of subset of match signals from either the first or second pluralities of row sections.

Abstract: A variable stiffness actuator comprises a flexure plate which comprises a first cantilevered beam that extends inwards from an outer periphery of the flexure plate. A housing and the flexure plate rotatable about a common joint axis. A first contactor is pivotably secured at a revolute joint to the housing. The first contactor rotates about the revolute joint at a first rotation axis. The first rotation axis offset on the housing from the joint axis. The first contactor engages the first cantilevered beam at a variable angle about the rotation axis to adjust a stiffness of a mechanical connection between the flexure plate and the housing.

Abstract: A variable stiffness actuator comprises a flexure plate which comprises a first cantilevered beam that extends inwards from an outer periphery of the flexure plate. A housing and the flexure plate rotatable about a common joint axis. A first contactor is pivotably secured at a revolute joint to the housing. The first contactor rotates about the revolute joint at a first rotation axis. The first rotation axis offset on the housing from the joint axis. The first contactor engages the first cantilevered beam at a variable angle about the rotation axis to adjust a stiffness of a mechanical connection between the flexure plate and the housing.