Abstract: A circuit with delay compensation for variable delays, such as those caused by environmental conditions. A delay compensation element having a delay pattern that matches the delay pattern of the circuit to be compensated is included in the feedback path of a phase locked loop. The delay compensation is described as a programmable delay, which has a rate of change in relation to temperature that varies with the programmed value of the delay. Such a circuit is used in a channel of automatic test equipment. The delay element is incorporated in the feedback path of a phase locked loop used in a clock generation circuit. The structure provides for edge placement accuracies below 250 picoseconds, even if CMOS components are used in the channel.

Abstract: A time measurement system that uses two signals generated by direct digital synthesis. The generated signals have the same frequency but different phase. One signal is used to identify the start of the measurement interval and the other signal is used to identify a measurement window in which a signal indicating the end of the measured interval might be detected. The time measurement system is used as part of a time domain reflectometry (TDR) system. An incident pulse is synchronized to the first signal and launched down on a line. In the measurement window, the signal on the line is compared to a threshold value to determine whether the pulse has been reflected and traveled back to the source. By iteratively repeating the measurement with a different measurement window, the time of arrival of the reflected pulse can be determined. This time domain reflectometry approach is incorporated into automatic test equipment for testing semiconductor devices and is used to calibrate the test equipment.

Abstract: A clock system for providing a high-speed clock signal to a plurality of integrated circuits is disclosed. The clock system includes an analog signal generator for producing a periodic analog signal of a predetermined frequency and fanout circuitry. The fanout circuitry is coupled to the analog signal generator and includes a transmission line and an RF coupler. The system further includes a plurality of receivers. Each receiver has reference signal input circuitry and clock signal input circuitry. Both the reference signal circuitry and the clock signal circuitry are receptive to coupling locally generated common mode noise. The clock signal circuitry is disposed proximate the RF coupler to provide an RF coupling therebetween.