Abstract: Groups of DCVS (Differential Cascode Voltage Switch) circuits are interconnected by single-track data transfer connections. Each group contains one or more DCVS tree circuits, through which data signals propagate only on dual-track connections. In each group, at least one DCVS tree circuit is configured as an input boundary tree, and at least one tree circuit is configured as an output boundary tree. All data inputs externally applied to a group, are transferred only through input boundary trees of the group, and all data outputs transferred out of a group leave the group only through output boundary trees of the group. If a group has only a single tree, that tree serves as input and output boundary tree of the group. Each input boundary tree of each group has one or more associated primary shift register latch (SRL) circuits through which all external data inputs to that tree are transferred. Such external data inputs are received through the single-track connections mentioned above.

Abstract: A basic tree construction, from which differential cascode voltage switch (DCVS) circuits having variable logic personality can be formed, contains n (>2) rows of differentially associated semiconductor device pairs spanned by n pairs of complementary input conductor leads, and a load circuit coupled to drain terminals of devices in the nth row. The nth row contains 2 device pairs and each other row contains 2.sup.i-1 device pairs (i=1, 2, . . . , n-1). Connections between source and drain terminals of devices in successive rows are predefined from the 1st to the n-1st row and variably definable between the n-1st and nth rows. Connections between input conductors and device gate terminals are predefined in each row other than the nth row, and variably definable in the nth row. Upon selectively defining a set of variable connections relative to the n-1st and nth rows the logic personality of the tree is selected to conform to any one of all possible functions of n variables.