Patents by Inventor Jacques Arnould

Jacques Arnould has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Cellular power semiconductor device
    Patent number: 5025299
    Abstract: The invention relates to a cellular power semiconductor device of the type comprising a substrate which comprises on its surface n-type and p-type cells (11, 12) alternating in a regular network. The various cells are connected respectively to two connection areas (90e, 90b) by means of two interconnection levels (100, 200) each comprising a pair of conductive sheets (30, 50; 70, 90) connected to one another in frontier zones (ZF ZF').
    Type: Grant
    Filed: February 2, 1990
    Date of Patent: June 18, 1991
    Assignee: Telemecanique
    Inventor: Jacques Arnould
  • Deep-grid semiconductor device
    Patent number: 4620213
    Abstract: A semiconductor device has a deep control grid. A silicon substrate is grooved. The side walls and the bottom of the grooves are oxidized. Under the bottom of the grooves a dopant is implanted and diffused. A main metalization covering the grooved face makes a contact with the surface thereof and the parts of this metalization falling in the grooves does not cause any parasitic effect as the walls and the bottom of the grooves are insulated.
    Type: Grant
    Filed: December 29, 1983
    Date of Patent: October 28, 1986
    Assignee: Thomson-CSF
    Inventors: Jacques Arnould, Eugene Tonnel
  • Semiconductor device with deep grip accessible via the surface and process for manufacturing same
    Patent number: 4520552
    Abstract: A semiconductor device with deep grid accessible via the surface having a silicon substrate and comprising U-shaped grooves. The upper parts of the side walls of these grooves are insulated by a silica layer and the lower parts of these grooves connect up with overdoped zones. Polycrystalline silicon provides ohmic contact between selected positions on the upper face of the transistor and the grid layer.
    Type: Grant
    Filed: January 16, 1984
    Date of Patent: June 4, 1985
    Assignee: Thomson-CSF
    Inventors: Jacques Arnould, Eugene Tonnel
  • Process for mounting a protection diode on a vertical multijunction photovoltaic cell structure and photovoltaic cells obtained
    Patent number: 4348545
    Abstract: In a stack of diodes forming a vertical multijunction photovoltaic cell, an inversely connected diode is firmly secured to this stack with possible insertion of a intermediate wafer made from a conducting material.
    Type: Grant
    Filed: January 28, 1981
    Date of Patent: September 7, 1982
    Assignee: Le Silicium Semiconducteur SSC
    Inventor: Jacques Arnould
  • Process for cooling a solar cell and a combined photovoltaic and photothermic solar device
    Patent number: 4339627
    Abstract: A solar cell cooling process. The device implementing this process comprises a transparent assembly disposed in front of a photovoltaic cell. The transparent assembly, through which flows the cooling fluid leaving a radiator integral with the cell, absorbs the wavelengths greater than 1.1. micron. Thus, heating of the cell is limited and the fluid leaving the radiator is heated by the beam striking the cell.
    Type: Grant
    Filed: January 28, 1981
    Date of Patent: July 13, 1982
    Assignee: Le Silicium Semiconducteur SSC
    Inventor: Jacques Arnould