Patents by Inventor Jacques Chavade

Jacques Chavade has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9006904
    Abstract: An electronic package includes a substrate wafer with an interconnect network. A first chip is fixed to a front of the substrate, connected to the interconnect network and encapsulated by a body. A second chip is placed on a back side of the substrate wafer and connected to the interconnect network by back-side connection elements interposed between the back side of the substrate and a front side of the second chip. Front-side connection elements are placed on the front side of the substrate and connected to the interconnect network. The connection elements extend beyond the frontal face of the body. The package may be mounted on a board with an interposed thermally conductive material.
    Type: Grant
    Filed: October 18, 2012
    Date of Patent: April 14, 2015
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventors: Dominique Marais, Jacques Chavade, Rémi Brechignac, Eric Saugier, Romain Coffy, Luc Petit
  • Patent number: 8013253
    Abstract: An electrical connection board includes electrical connection terminals on one face with a view toward connecting with a semiconductor component and electrical connection tracks connected respectively to these terminals. The terminals are arranged in a square matrix having two orthogonal directions. On its face, the board includes a multiplicity of identical adjacent connection groups, each group having N adjacent terminals and N tracks placed along this direction while extending towards an edge of the matrix. The terminals of a group are offset by one pitch relative to the terminals of an adjacent group. The board and a semiconductor component are connected together by electrical connection balls.
    Type: Grant
    Filed: April 4, 2008
    Date of Patent: September 6, 2011
    Assignee: STMicroelectronics S.A.
    Inventors: Pierre Bormann, Luc Morineau, Jacques Chavade
  • Patent number: 7888791
    Abstract: A device is provided for electrically connecting an integrated circuit chip. The device includes a main board, an intermediate board, and electrical connection balls in a space separating the boards. In the space, a peripheral zone comprises a peripheral matrix of balls, a central zone comprises a central matrix of balls, a first secondary zone comprises a matrix of electrical connection vias linked to the balls of the two adjacent rows of balls of the peripheral matrix, and a second secondary zone comprises a matrix of electrical connection vias linked to balls of the central matrix. The first secondary zone and the second secondary zone are separated by an intermediate zone that includes at least a first part having at least one complementary row of electrical connection balls, and a second part having complementary electrical connection vias linked to the balls of this complementary row.
    Type: Grant
    Filed: August 19, 2009
    Date of Patent: February 15, 2011
    Assignee: STMicroelectronics S.A.
    Inventors: Pierre Bormann, Luc Morineau, Jacques Chavade
  • Publication number: 20090310319
    Abstract: A device is provided for electrically connecting an integrated circuit chip. The device includes a main board, an intermediate board, and electrical connection balls in a space separating the boards. In the space, a peripheral zone comprises a peripheral matrix of balls, a central zone comprises a central matrix of balls, a first secondary zone comprises a matrix of electrical connection vias linked to the balls of the two adjacent rows of balls of the peripheral matrix, and a second secondary zone comprises a matrix of electrical connection vias linked to balls of the central matrix. The first secondary zone and the second secondary zone are separated by an intermediate zone that includes at least a first part having at least one complementary row of electrical connection balls, and a second part having complementary electrical connection vias linked to the balls of this complementary row.
    Type: Application
    Filed: August 19, 2009
    Publication date: December 17, 2009
    Applicant: STMicroelectronics SA.
    Inventors: PIERRE BORMANN, Luc Morineau, Jacques Chavade
  • Patent number: 7589411
    Abstract: A device is provided for electrically connecting an integrated circuit chip. The device includes a main board, an intermediate board, and electrical connection balls in a space separating the boards. In the space, a peripheral zone comprises a peripheral matrix of balls, a central zone comprises a central matrix of balls, a first secondary zone comprises a matrix of electrical connection vias linked to the balls of the two adjacent rows of balls of the peripheral matrix, and a second secondary zone comprises a matrix of electrical connection vias linked to balls of the central matrix. The first secondary zone and the second secondary zone are separated by an intermediate zone that includes at least a first part having at least one complementary row of electrical connection balls, and a second part having complementary electrical connection vias linked to the balls of this complementary row.
    Type: Grant
    Filed: December 16, 2005
    Date of Patent: September 15, 2009
    Assignee: STMicroelectronics SA
    Inventors: Pierre Bormann, Luc Morineau, Jacques Chavade
  • Publication number: 20080261415
    Abstract: An electrical connection board includes electrical connection terminals on one face with a view toward connecting with a semiconductor component and electrical connection tracks connected respectively to these terminals. The terminals are arranged in a square matrix having two orthogonal directions. On its face, the board includes a multiplicity of identical adjacent connection groups, each group having N adjacent terminals and N tracks placed along this direction while extending towards an edge of the matrix. The terminals of a group are offset by one pitch relative to the terminals of an adjacent group. The board and a semiconductor component are connected together by electrical connection balls.
    Type: Application
    Filed: April 4, 2008
    Publication date: October 23, 2008
    Applicant: STMicroelectronics S.A.
    Inventors: Pierre Bormann, Luc Morineau, Jacques Chavade
  • Publication number: 20060138636
    Abstract: A device is provided for electrically connecting an integrated circuit chip. The device includes a main board, an intermediate board, and electrical connection balls in a space separating the boards. In the space, a peripheral zone comprises a peripheral matrix of balls, a central zone comprises a central matrix of balls, a first secondary zone comprises a matrix of electrical connection vias linked to the balls of the two adjacent rows of balls of the peripheral matrix, and a second secondary zone comprises a matrix of electrical connection vias linked to balls of the central matrix. The first secondary zone and the second secondary zone are separated by an intermediate zone that includes at least a first part having at least one complementary row of electrical connection balls, and a second part having complementary electrical connection vias linked to the balls of this complementary row.
    Type: Application
    Filed: December 16, 2005
    Publication date: June 29, 2006
    Applicant: STMICROELECTRONICS SA
    Inventors: Pierre Bormann, Luc Morineau, Jacques Chavade