Abstract: The apparatus is designed to use a single transmission medium to multiplex frames consisting of any number of bits of different origins which have previously passed through an asynchronous time-division network and are delivered in the form of packets of fixed length interlaced by an asynchronous time-division multiplex. A detection and write management circuit receives the packets and writes them in a packet memory as and when they arrive. In parallel with the writing of the packets, the addresses of the memory cell having memorized the packets of a given frame are written in the form of a string of frame addresses in a second memory. After complete writing of a frame in the first memory, a frame read and transmission circuit completely reads the frame using the corresponding address string and transmits it in serial form on the transmission medium. Packing words such as flags are inserted between the frames read.