Patents by Inventor Jacques M. J. Bienvenu

Jacques M. J. Bienvenu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4472771
    Abstract: A central sub-system of a data processing system, including an operator console controlling a service processor, is divided into several sub-units, functioning separately from each other. The sub-units include processors that are connected together and to a common controller for a common memory unit by data, address and control buses. Each sub-unit includes a configuration device that stores an appurtenance indicator derived from the service processor in response to sub-unit initialization, and enables its associated sub-unit to exchange data with the memory unit. The sub-unit having the highest priority of the sub-units attempting to access the memory units is connected to the memory unit by the controller. A single configuration memory stores an indication of the sub-units in service in the central sub-system. The configuration memory is addressed each time the memory unit is addressed by a signal indicative of the appurtenance indicator derived from the selected sub-unit.
    Type: Grant
    Filed: November 13, 1980
    Date of Patent: September 18, 1984
    Assignee: Compagnie Internationale pour l'Informatique CII Honeywell Bull (Societe Anonyme)
    Inventors: Jacques M. J. Bienvenu, Pierre G. Antoine, Robert J. A. Bavoux, Daniel R. Vinot
  • Patent number: 4385352
    Abstract: A data processing system includes apparatus for addressing operands within a segment utilizing segment descriptors. The apparatus is responsive to instruction words executed by a first of a plurality of processes.
    Type: Grant
    Filed: April 13, 1981
    Date of Patent: May 24, 1983
    Assignee: Compagnie Internationale pour l'Informatique CII-Honeywell Bull (Societe Anonyme)
    Inventor: Jacques M. J. Bienvenu
  • Patent number: 4145734
    Abstract: The disclosure describes improved apparatus and method for implementing the test of various computer functional units interconnected by a common bus. At the beginning of the method, each functional unit is subjected to an enforced condition which disconnects it from the bus. Then, one of the units is subjected to an enforced condition which connects it to the bus and is tested under microprogram control. After the one unit has been tested, another unit is connected to the bus and is tested. In this manner the functional units after first being disconnected from the common bus are reconnected and tested one at a time and those units which have no error detected therein are maintained connected.
    Type: Grant
    Filed: January 18, 1977
    Date of Patent: March 20, 1979
    Assignee: Compagnie Honeywell Bull (Societe Anonyme)
    Inventor: Jacques M. J. Bienvenu