Abstract: Some embodiments are directed to a kit of parts that includes heat sink parts, each heat sink part having a contact area for contacting a surface of an electronic device. The heat sink parts are connected but are spaced apart to allow them to adjust and keep their contact areas contacting the surface of the electronic device when the surface is distorted, for example due to heating. A heat sink part includes at least two spaced apart heat sink elements which are connected.

Abstract: Some embodiments are directed to a method of determining a sintering thermal impedance of a sintering layer by: providing a substrate having a predetermined substrate thermal impedance and disposing the sintering layer on the substrate forming with the sintering layer a stack. Placing at least one semiconductor die, that includes a semiconductor element with at least two element electrodes on the sintering layer. Injecting an electrical current through the at least two element electrodes for measuring a temperature sensitive parameter of the semiconductor element. Heating the stack with a predetermined heat power and determining, while sintering, a semiconductor element temperature from the measured temperature sensitive parameter.

Abstract: Some embodiments are directed to a semiconductor power device and a method of assembling such a device is provided. The semiconductor power device includes a first substrate, a second substrate and an interconnect structure. The first substrate includes a switching semiconductor element, a first electrically conductive layer(s) and a first receiving element. The second substrate includes a second receiving element and a second electrically conductive layer(s). The interconnect structure provides an electrical connection between the first electrically conductive layer and the second electrically conductive layer. The interconnect structure further includes a plurality of interconnect elements of an electrical conductive material. At least one of the plurality of interconnect elements is an alignment interconnect element.

Abstract: A method of determining a sintering thermal impedance of a sintering layer (25) comprising: providing a substrate (20) having a predetermined substrate thermal impedance, disposing the sintering layer (25) on the substrate (20) forming with the sintering layer (25) a stack, placing at least one semiconductor die (30) comprising a semiconductor element (40) with at least two element electrodes (45; 47) on the sintering layer (25), injecting an electrical current through the at least two element electrodes (45; 47) for measuring a temperature sensitive parameter of the semiconductor element (40), heating the stack with a predetermined heat power, determining, while sintering, a semiconductor element temperature from the measured temperature sensitive parameter, measuring a stack temperature, determining a stack thermal impedance by subtracting the semiconductor element temperature from the stack temperature and dividing by the predetermined heat power, and subtracting the predetermined substrate thermal impedan

Abstract: Some embodiments relate to a semiconductor power device that includes a first substrate, a second substrate, a stack and an interconnect structure. The first substrate includes a first patterned electrically conductive layer on a first surface and a switching semiconductor element. The second substrate includes a second surface facing the first surface and a second patterned electrically conductive layer on the second surface. The stack includes an electrically conductive track and a layer of a dielectric material. The layer of the dielectric material is provided on the first or second patterned electrically conductive layer and the layer of the dielectric material isolates the electrically conductive track from the patterned electrically conductive layer on which the stack is provided. The interconnect structure provides at least one electrical connection electrically conductive layers or areas of the substrates.

Abstract: Some embodiments are directed to a semiconductor power device and a method of assembling such a device is provided. The semiconductor power device includes a first substrate, a second substrate and an interconnect structure. The first substrate includes a switching semiconductor element, a first electrically conductive layer(s) and a first receiving element. The second substrate includes a second receiving element and a second electrically conductive layer(s). The interconnect structure provides an electrical connection between the first electrically conductive layer and the second electrically conductive layer. The interconnect structure further includes a plurality of interconnect elements of an electrical conductive material. At least one of the plurality of interconnect elements is an alignment interconnect element.

Abstract: Some embodiments relate to a semiconductor power device that includes a first substrate, a second substrate, a stack and an interconnect structure. The first substrate includes a first patterned electrically conductive layer on a first surface and a switching semiconductor element. The second substrate includes a second surface facing the first surface and a second patterned electrically conductive layer on the second surface. The stack includes an electrically conductive track and a layer of a dielectric material. The layer of the dielectric material is provided on the first or second patterned electrically conductive layer and the layer of the dielectric material isolates the electrically conductive track from the patterned electrically conductive layer on which the stack is provided. The interconnect structure provides at least one electrical connection electrically conductive layers or areas of the substrates.