Patents by Inventor Jae Beom Shim
Jae Beom Shim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11978687Abstract: In one example, a semiconductor device can comprise (a) an electronic device comprising a device top side, a device bottom side opposite the device top side, and a device sidewall between the device top side and the device bottom side, (b) a first conductor comprising, a first conductor side section on the device sidewall, a first conductor top section on the device top side and coupled to the first conductor side section, and a first conductor bottom section coupled to the first conductor side section, and (c) a protective material covering the first conductor and the electronic device. A lower surface of the first conductor top section can be higher than the device top side, and an upper surface of the first conductor bottom section can be lower than the device top side. Other examples and related methods are also disclosed herein.Type: GrantFiled: January 13, 2023Date of Patent: May 7, 2024Assignee: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.Inventors: Kyeong Tae Kim, Yi Seul Han, Jae Beom Shim, Tae Yong Lee
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Publication number: 20240096858Abstract: In one example, an electronic device comprises a lower substrate comprising a lower dielectric structure and a lower conductive structure, an electronic component coupled with a bottom side of the lower substrate and coupled with the lower conductive structure, an upper substrate over a top side of the lower substrate and comprising an upper dielectric structure and an upper conductive structure, an internal interconnect between the upper substrate and the lower substrate and coupled with the upper conductive structure and the lower conductive structure, and a first antenna component between the upper substrate and the lower substrate and coupled with the upper conductive structure. Other examples and related methods are also disclosed herein.Type: ApplicationFiled: September 15, 2022Publication date: March 21, 2024Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Kyoung Yeon Lee, Jae Beom Shim, Byong Jin Kim
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Publication number: 20240063145Abstract: An electronic device includes a substrate having a conductive structure with a substrate outward terminal at a second side of the substrate. A dielectric structure with an opening is adjacent to the second side. An electronic component is coupled to the substrate and an encapsulant encapsulates the electronic component. The substrate outward terminal comprises a multi-via terminal or a multi-stage via. The multi-via terminal includes pad conductive vias in the opening, a pad dielectric via interposed between the pad conductive vias, and a conductor comprising a conductor top side with micro dimples over the pad conductive vias and the pad dielectric via. The multi-stage terminal includes a pad base within the opening having a top side recessed below an upper surface the dielectric and a pad head coupled to the pad base within the opening, the pad head having a top side with a micro dimple.Type: ApplicationFiled: October 31, 2023Publication date: February 22, 2024Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Tae Ki KIM, Jae Beom SHIM, Min Jae YI, Yi Seul HAN, Young Ju LEE, Kyeong Tae KIM
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Patent number: 11830823Abstract: In one example, an electronic device includes a substrate having a conductive structure. The conductive structure includes a substrate inward terminal at a first side of the substrate and a substrate outward terminal at a second side of the substrate. The substrate includes a dielectric structure with a first opening is at the second side. An electronic component is at the first side of the substrate and is electrically coupled to the substrate inward terminal, and an encapsulant encapsulates the electronic component. The substrate outward terminal comprises one of a multi-via terminal or a multi-stage via. The multi-via terminal includes pad conductive vias in the first opening a pad dielectric via interposed between the pad conductive vias in the first opening and a conductor comprising a conductor top side with micro dimples over the pad conductive vias and the pad dielectric via.Type: GrantFiled: September 9, 2020Date of Patent: November 28, 2023Assignee: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Tae Ki Kim, Jae Beom Shim, Min Jae Yi, Yi Seul Han, Young Ju Lee, Kyeong Tae Kim
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Publication number: 20230253279Abstract: In one example, a semiconductor device can comprise (a) an electronic device comprising a device top side, a device bottom side opposite the device top side, and a device sidewall between the device top side and the device bottom side, (b) a first conductor comprising, a first conductor side section on the device sidewall, a first conductor top section on the device top side and coupled to the first conductor side section, and a first conductor bottom section coupled to the first conductor side section, and (c) a protective material covering the first conductor and the electronic device. A lower surface of the first conductor top section can be higher than the device top side, and an upper surface of the first conductor bottom section can be lower than the device top side. Other examples and related methods are also disclosed herein.Type: ApplicationFiled: January 13, 2023Publication date: August 10, 2023Inventors: Kyeong Tae Kim, Yi Seul Han, Jae Beom Shim, Tae Yong Lee
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Patent number: 11557524Abstract: In one example, a semiconductor device can comprise (a) an electronic device comprising a device top side, a device bottom side opposite the device top side, and a device sidewall between the device top side and the device bottom side, (b) a first conductor comprising, a first conductor side section on the device sidewall, a first conductor top section on the device top side and coupled to the first conductor side section, and a first conductor bottom section coupled to the first conductor side section, and (c) a protective material covering the first conductor and the electronic device. A lower surface of the first conductor top section can be higher than the device top side, and an upper surface of the first conductor bottom section can be lower than the device top side. Other examples and related methods are also disclosed herein.Type: GrantFiled: May 24, 2021Date of Patent: January 17, 2023Assignee: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.Inventors: Kyeong Tae Kim, Yi Seul Han, Jae Beom Shim, Tae Yong Lee
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Publication number: 20220262762Abstract: In one example, a semiconductor device comprises an electronic component comprising a component face side, a component base side, a component lateral side connecting the component face side to the component base side, and a component port adjacent to the component face side, wherein the component port comprises a component port face. A clip structure comprises a first clip pad, a second clip pad, a first clip leg connecting the first clip pad to the second clip pad, and a first clip face. An encapsulant covers portions of the electronic component and the clip structure. The encapsulant comprises an encapsulant face, the first clip pad is coupled to the electronic component, and the component port face and the first clip face are exposed from the encapsulant face. Other examples and related methods are also disclosed herein.Type: ApplicationFiled: May 6, 2022Publication date: August 18, 2022Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Ji Yeon RYU, Jae Beom SHIM, Tai Yong LEE, Byong Jin KIM
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Publication number: 20220238441Abstract: In one example, a semiconductor device comprises a redistribution layer (RDL) substrate having a top surface and a bottom surface, wherein the RDL substrate comprises a filler-free dielectric material, an electronic device on the top surface of the RDL substrate, an electrical interconnect on the bottom surface of the RDL substrate and electrically coupled to the electronic device, a first protective material contacting a side surface of the electronic device and the top surface of the RDL substrate, and a second protective material contacting a side surface of the electrical interconnect and the bottom surface of the RDL substrate. Other examples and related methods are also disclosed herein.Type: ApplicationFiled: April 13, 2022Publication date: July 28, 2022Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Tae Ki Kim, Jae Beom Shim, Seung Nam Son, Won Chul Do
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Patent number: 11355470Abstract: In one example, a semiconductor device comprises an electronic component comprising a component face side, a component base side, a component lateral side connecting the component face side to the component base side, and a component port adjacent to the component face side, wherein the component port comprises a component port face. A clip structure comprises a first clip pad, a second clip pad, a first clip leg connecting the first clip pad to the second clip pad, and a first clip face. An encapsulant covers portions of the electronic component and the clip structure. The encapsulant comprises an encapsulant face, the first clip pad is coupled to the electronic component, and the component port face and the first clip face are exposed from the encapsulant face. Other examples and related methods are also disclosed herein.Type: GrantFiled: February 27, 2020Date of Patent: June 7, 2022Assignee: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Ji Yeon Ryu, Jae Beom Shim, Tae Yong Lee, Byong Jin Kim
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Publication number: 20220077077Abstract: In one example, an electronic device includes a substrate having a conductive structure. The conductive structure includes a substrate inward terminal at a first side of the substrate and a substrate outward terminal at a second side of the substrate. The substrate includes a dielectric structure with a first opening is at the second side. An electronic component is at the first side of the substrate and is electrically coupled to the substrate inward terminal, and an encapsulant encapsulates the electronic component. The substrate outward terminal comprises one of a multi-via terminal or a multi-stage via. The multi-via terminal includes pad conductive vias in the first opening a pad dielectric via interposed between the pad conductive vias in the first opening and a conductor comprising a conductor top side with micro dimples over the pad conductive vias and the pad dielectric via.Type: ApplicationFiled: September 9, 2020Publication date: March 10, 2022Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Tae Ki KIM, Jae Beom SHIM, Min Jae YI, Yi Seul HAN, Young Ju LEE, Kyeong Tae KIM
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Patent number: 11121077Abstract: In one example, a semiconductor device comprises a substrate comprising a dielectric, a first conductor on a top side of the dielectric, and a second conductor on a bottom side of the dielectric, wherein the dielectric has an aperture, and the first conductor comprises a partial via contacting a pad of the second conductor through the aperture, an electronic device having an interconnect electrically coupled to the first conductor, and an encapsulant on a top side of the substrate contacting a side of the electronic device. Other examples and related methods are also disclosed herein.Type: GrantFiled: July 10, 2019Date of Patent: September 14, 2021Assignee: Amkor Technology Singapore Holding PTE. LTD.Inventors: Ji Yeon Ryu, Jae Beom Shim
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Publication number: 20210280484Abstract: In one example, a semiconductor device can comprise (a) an electronic device comprising a device top side, a device bottom side opposite the device top side, and a device sidewall between the device top side and the device bottom side, (b) a first conductor comprising, a first conductor side section on the device sidewall, a first conductor top section on the device top side and coupled to the first conductor side section, and a first conductor bottom section coupled to the first conductor side section, and (c) a protective material covering the first conductor and the electronic device. A lower surface of the first conductor top section can be higher than the device top side, and an upper surface of the first conductor bottom section can be lower than the device top side. Other examples and related methods are also disclosed herein.Type: ApplicationFiled: May 24, 2021Publication date: September 9, 2021Inventors: Kyeong Tae Kim, Yi Seul Han, Jae Beom Shim, Tae Yong Lee
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Publication number: 20210272923Abstract: In one example, a semiconductor device comprises an electronic component comprising a component face side, a component base side, a component lateral side connecting the component face side to the component base side, and a component port adjacent to the component face side, wherein the component port comprises a component port face. A clip structure comprises a first clip pad, a second clip pad, a first clip leg connecting the first clip pad to the second clip pad, and a first clip face. An encapsulant covers portions of the electronic component and the clip structure. The encapsulant comprises an encapsulant face, the first clip pad is coupled to the electronic component, and the component port face and the first clip face are exposed from the encapsulant face. Other examples and related methods are also disclosed herein.Type: ApplicationFiled: February 27, 2020Publication date: September 2, 2021Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Ji Yeon RYU, Jae Beom SHIM, Tae Yong LEE, Byong Jin KIM
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Patent number: 11018067Abstract: In one example, a semiconductor device can comprise (a) an electronic device comprising a device top side, a device bottom side opposite the device top side, and a device sidewall between the device top side and the device bottom side, (b) a first conductor comprising, a first conductor side section on the device sidewall, a first conductor top section on the device top side and coupled to the first conductor side section, and a first conductor bottom section coupled to the first conductor side section, and (c) a protective material covering the first conductor and the electronic device. A lower surface of the first conductor top section can be higher than the device top side, and an upper surface of the first conductor bottom section can be lower than the device top side. Other examples and related methods are also disclosed herein.Type: GrantFiled: May 22, 2019Date of Patent: May 25, 2021Assignee: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.Inventors: Kyeong Tae Kim, Yi Seul Han, Jae Beom Shim, Tae Yong Lee
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Publication number: 20210013144Abstract: In one example, a semiconductor device comprises a substrate comprising a dielectric, a first conductor on a top side of the dielectric, and a second conductor on a bottom side of the dielectric, wherein the dielectric has an aperture, and the first conductor comprises a partial via contacting a pad of the second conductor through the aperture, an electronic device having an interconnect electrically coupled to the first conductor, and an encapsulant on a top side of the substrate contacting a side of the electronic device. Other examples and related methods are also disclosed herein.Type: ApplicationFiled: July 10, 2019Publication date: January 14, 2021Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Ji Yeon Ryu, Jae Beom Shim
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Publication number: 20200373214Abstract: In one example, a semiconductor device can comprise (a) an electronic device comprising a device top side, a device bottom side opposite the device top side, and a device sidewall between the device top side and the device bottom side, (b) a first conductor comprising, a first conductor side section on the device sidewall, a first conductor top section on the device top side and coupled to the first conductor side section, and a first conductor bottom section coupled to the first conductor side section, and (c) a protective material covering the first conductor and the electronic device. A lower surface of the first conductor top section can be higher than the device top side, and an upper surface of the first conductor bottom section can be lower than the device top side. Other examples and related methods are also disclosed herein.Type: ApplicationFiled: May 22, 2019Publication date: November 26, 2020Inventors: Kyeong Tae Kim, Yi Seul Han, Jae Beom Shim, Tae Yong Lee
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Publication number: 20200335441Abstract: In one example, a semiconductor device comprises a redistribution layer (RDL) substrate having a top surface and a bottom surface, wherein the RDL substrate comprises a filler-free dielectric material, an electronic device on the top surface of the RDL substrate, an electrical interconnect on the bottom surface of the RDL substrate and electrically coupled to the electronic device, a first protective material contacting a side surface of the electronic device and the top surface of the RDL substrate, and a second protective material contacting a side surface of the electrical interconnect and the bottom surface of the RDL substrate. Other examples and related methods are also disclosed herein.Type: ApplicationFiled: April 18, 2019Publication date: October 22, 2020Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Tae Ki Kim, Jae Beom Shim, Seung Nam Son, Won Chul Do
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Patent number: 10141270Abstract: A semiconductor device and a method of manufacturing a semiconductor device. As a non-limiting example, various aspects of this disclosure provide a semiconductor device comprising a semiconductor die coupled to a substrate and surrounded by a perforated metal plane and a method of manufacturing thereof.Type: GrantFiled: December 9, 2016Date of Patent: November 27, 2018Assignee: Amkor Technology, Inc.Inventors: Yi Seul Han, Tae Yong Lee, Jae Beom Shim
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Publication number: 20180166393Abstract: A semiconductor device and a method of manufacturing a semiconductor device. As a non-limiting example, various aspects of this disclosure provide a semiconductor device comprising a semiconductor die coupled to a substrate and surrounded by a perforated metal plane and a method of manufacturing thereof.Type: ApplicationFiled: December 9, 2016Publication date: June 14, 2018Inventors: Yi Seul Han, Tae Yong Lee, Jae Beom Shim
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Patent number: 7977783Abstract: A wafer level chip size package (WLCSP) and a method of manufacturing the same are disclosed. Lands are formed at the ends of redistribution layers. The redistribution layers excluding the lands and a first dielectric layer are covered with a second dielectric layer. After forming a first under bump metallurgy (UBM) layer on the land, a solder ball is reflowed to the first UBM layer. A second UBM layer is widely formed on the entire second dielectric layer that is the outer circumference of the first UBM layer and is connected to the redistribution layer through a via-hole. Therefore, the second UBM layer having a large area can be used as a ground plane or a power plane. In addition, the second UBM layer can electrically connect the redistribution layers physically separated from each other. Therefore, the plurality of redistribution layers can cross each other without being electrically shorted with each other.Type: GrantFiled: August 27, 2009Date of Patent: July 12, 2011Assignee: Amkor Technology, Inc.Inventors: No Sun Park, Young Suk Chung, Jae Beom Shim