Patents by Inventor Jae-Boong Lee
Jae-Boong Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12136626Abstract: An integrated circuit includes a first cell arranged in a first row extending in a first horizontal direction, a second cell arranged in a second row adjacent to the first row, and a third cell continuously arranged in the first row and the second row. The first cell and the second cell comprise respective portions of a first power line extending in the first horizontal direction, and the third cell includes a second power line electrically connected to the first power line and extending in the first horizontal direction in the first row.Type: GrantFiled: August 19, 2021Date of Patent: November 5, 2024Assignee: Samsung Electronics Co., Ltd.Inventors: Jung-ho Do, Ji-su Yu, Hyeon-gyu You, Seung-young Lee, Jae-boong Lee
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Patent number: 12125787Abstract: An integrated circuit including: a power rail including first and second conductive lines spaced apart from each other in a vertical direction, wherein the first and second conductive lines extend in parallel to each other in a first horizontal direction, and are electrically connected to each other, to supply power to a first standard cell, wherein the first and second conductive lines are disposed at a boundary of the first standard cell; and a third conductive line between the first and second conductive lines and extending in a second horizontal direction orthogonal to the first horizontal direction, to transfer an input signal or an output signal of the first standard cell.Type: GrantFiled: September 29, 2020Date of Patent: October 22, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jae-Boong Lee, Jung-Ho Do, Tae-Joong Song, Seung-Young Lee, Jong-Hoon Jung, Ji-Su Yu
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Publication number: 20210384222Abstract: An integrated circuit includes a first cell arranged in a first row extending in a first horizontal direction, a second cell arranged in a second row adjacent to the first row, and a third cell continuously arranged in the first row and the second row. The first cell and the second cell comprise respective portions of a first power line extending in the first horizontal direction, and the third cell includes a second power line electrically connected to the first power line and extending in the first horizontal direction in the first row.Type: ApplicationFiled: August 19, 2021Publication date: December 9, 2021Inventors: Jung-ho Do, Ji-su Yu, Hyeon-gyu You, Seung-young Lee, Jae-boong Lee
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Patent number: 11183497Abstract: A semiconductor device includes first group active fins and a first diffusion prevention pattern. The first group active fins are spaced apart from each other in a second direction, and each of the first group active fins extends in a first direction different from the second direction on a first region of a substrate including the first region and a second region. The first diffusion prevention pattern extends on the first region of the substrate in the second direction through the first group active fins. The first group active fins include first and second active fins. The first diffusion prevention pattern extends through a central portion of the first active fin in the first direction to divide the first active fin, and extends through and contacts an end of the second active fin in the first direction.Type: GrantFiled: August 5, 2019Date of Patent: November 23, 2021Assignee: Samsung Electronics Co., Ltd.Inventors: Jae-Boong Lee, Jae-Ho Park, Sang-Hoon Baek, Ji-Su Yu, Seung-Young Lee, Jong-Hoon Jung
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Patent number: 11152392Abstract: An integrated circuit includes a standard cell. The standard cell may include a plurality of gate lines and a plurality of first wirings. The plurality of first wirings may include a clubfoot structure conductive pattern that includes a first conductive pattern and a second conductive pattern spaced apart from each other. Each of the first conductive pattern and the second conductive pattern may include a first line pattern extending in a first direction and a second line pattern protruding from one end of the first line pattern in a direction perpendicular to the first direction. The plurality of gate lines may be spaced apart from each other by a first pitch in the first direction, and the plurality of second wirings may be spaced apart from each other by a second pitch in the first direction. The first pitch may be greater than the second pitch.Type: GrantFiled: September 28, 2020Date of Patent: October 19, 2021Assignee: Samsung Electronics Co., Ltd.Inventors: Jung-ho Do, Ji-Su Yu, Hyeon-gyu You, Seung-Young Lee, Jae-boong Lee, Jong-hoon Jung
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Patent number: 11121155Abstract: An integrated circuit includes a first cell arranged in a first row extending in a first horizontal direction, a second cell arranged in a second row adjacent to the first row, and a third cell continuously arranged in the first row and the second row. The first cell and the second cell comprise respective portions of a first power line extending in the first horizontal direction, and the third cell includes a second power line electrically connected to the first power line and extending in the first horizontal direction in the first row.Type: GrantFiled: March 5, 2019Date of Patent: September 14, 2021Inventors: Jung-ho Do, Ji-su Yu, Hyeon-gyu You, Seung-young Lee, Jae-boong Lee
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Patent number: 11042686Abstract: Provided is an integrated circuit including a plurality of standard cells each including a front-end-of-line (FEOL) region and a back-end-of-line (BEOL) region on the FEOL region, the FEOL region including at least one gate line extending in a first horizontal direction. A BEOL region of a first standard cell among the plurality of standard cells includes an eaves section not overlapping an FEOL region of the first standard cell in a vertical direction, the eaves section protruding in a second horizontal direction perpendicular to the first horizontal direction.Type: GrantFiled: January 23, 2020Date of Patent: June 22, 2021Assignee: Samsung Electronics Co., Ltd.Inventors: Jung-ho Do, Jong-hoon Jung, Ji-Su Yu, Seung-young Lee, Tae-joong Song, Jae-boong Lee
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Publication number: 20210013230Abstract: An integrated circuit includes a standard cell. The standard cell may include a plurality of gate lines and a plurality of first wirings. The plurality of first wirings may include a clubfoot structure conductive pattern that includes a first conductive pattern and a second conductive pattern spaced apart from each other. Each of the first conductive pattern and the second conductive pattern may include a first line pattern extending in a first direction and a second line pattern protruding from one end of the first line pattern in a direction perpendicular to the first direction. The plurality of gate lines may be spaced apart from each other by a first pitch in the first direction, and the plurality of second wirings may be spaced apart from each other by a second pitch in the first direction. The first pitch may be greater than the second pitch.Type: ApplicationFiled: September 28, 2020Publication date: January 14, 2021Applicant: Samsung Electronics Co., Ltd.Inventors: Jung-ho DO, Ji-Su YU, Hyeon-gyu YOU, Seung-Young LEE, Jae-boong LEE, Jong-hoon JUNG
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Publication number: 20210013149Abstract: An integrated circuit including: a power rail including first and second conductive lines spaced apart from each other in a vertical direction, wherein the first and second conductive lines extend in parallel to each other in a first horizontal direction, and are electrically connected to each other, to supply power to a first standard cell, wherein the first and second conductive lines are disposed at a boundary of the first standard cell; and a third conductive line between the first and second conductive lines and extending in a second horizontal direction orthogonal to the first horizontal direction, to transfer an input signal or an output signal of the first standard cell.Type: ApplicationFiled: September 29, 2020Publication date: January 14, 2021Inventors: Jae-Boong Lee, Jung-Ho Do, Tae-Joong Song, Seung-Young Lee, Jong-Hoon Jung, Ji-Su Yu
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Patent number: 10811357Abstract: An integrated circuit including: a power rail including first and second conductive lines spaced apart from each other in a vertical direction, wherein the first and second conductive lines extend in parallel to each other in a first horizontal direction, and are electrically connected to each other, to supply power to a first standard cell, wherein the first and second conductive lines are disposed at a boundary of the first standard cell; and a third conductive line between the first and second conductive lines and extending in a second horizontal direction orthogonal to the first horizontal direction, to transfer an input signal or an output signal of the first standard cell.Type: GrantFiled: April 5, 2018Date of Patent: October 20, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jae-Boong Lee, Jung-Ho Do, Tae-Joong Song, Seung-Young Lee, Jong-Hoon Jung, Ji-Su Yu
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Patent number: 10790305Abstract: An integrated circuit includes a standard cell. The standard cell may include a plurality of gate lines and a plurality of first wirings. The plurality of first wirings may include a clubfoot structure conductive pattern that includes a first conductive pattern and a second conductive pattern spaced apart from each other. Each of the first conductive pattern and the second conductive pattern may include a first line pattern extending in a first direction and a second line pattern protruding from one end of the first line pattern in a direction perpendicular to the first direction. The plurality of gate lines may be spaced apart from each other by a first pitch in the first direction, and the plurality of second wirings may be spaced apart from each other by a second pitch in the first direction. The first pitch may be greater than the second pitch.Type: GrantFiled: May 10, 2019Date of Patent: September 29, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Jung-ho Do, Ji-Su Yu, Hyeon-gyu You, Seung-Young Lee, Jae-Boong Lee, Jong-Hoon Jung
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Publication number: 20200243523Abstract: A semiconductor device includes first group active fins and a first diffusion prevention pattern. The first group active fins are spaced apart from each other in a second direction, and each of the first group active fins extends in a first direction different from the second direction on a first region of a substrate including the first region and a second region. The first diffusion prevention pattern extends on the first region of the substrate in the second direction through the first group active fins. The first group active fins include first and second active fins. The first diffusion prevention pattern extends through a central portion of the first active fin in the first direction to divide the first active fin, and extends through and contacts an end of the second active fin in the first direction.Type: ApplicationFiled: August 5, 2019Publication date: July 30, 2020Applicant: Samsung Electronics Co., Ltd.Inventors: Jae-Boong LEE, Jae-Ho PARK, Sang-Hoon BAEK, Ji-Su YU, Seung-Young LEE, Jong-Hoon JUNG
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Publication number: 20200159984Abstract: Provided is an integrated circuit including a plurality of standard cells each including a front-end-of-line (FEOL) region and a back-end-of-line (BEOL) region on the FEOL region, the FEOL region including at least one gate line extending in a first horizontal direction. A BEOL region of a first standard cell among the plurality of standard cells includes an eaves section not overlapping an FEOL region of the first standard cell in a vertical direction, the eaves section protruding in a second horizontal direction perpendicular to the first horizontal direction.Type: ApplicationFiled: January 23, 2020Publication date: May 21, 2020Applicant: Samsung Electronics Co., Ltd.Inventors: Jung-ho DO, Jong-hoon JUNG, Ji-Su YU, Seung-young LEE, Tae-joong SONG, Jae-boong LEE
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Patent number: 10579771Abstract: Provided is an integrated circuit including a plurality of standard cells each including a front-end-of-line (FEOL) region and a back-end-of-line (BEOL) region on the FEOL region, the FEOL region including at least one gate line extending in a first horizontal direction. A BEOL region of a first standard cell among the plurality of standard cells includes an eaves section not overlapping an FEOL region of the first standard cell in a vertical direction, the eaves section protruding in a second horizontal direction perpendicular to the first horizontal direction.Type: GrantFiled: March 23, 2018Date of Patent: March 3, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Jung-ho Do, Jong-hoon Jung, Ji-su Yu, Seung-young Lee, Tae-joong Song, Jae-boong Lee
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Publication number: 20190355749Abstract: An integrated circuit includes a first cell arranged in a first row extending in a first horizontal direction, a second cell arranged in a second row adjacent to the first row, and a third cell continuously arranged in the first row and the second row. The first cell and the second cell comprise respective portions of a first power line extending in the first horizontal direction, and the third cell includes a second power line electrically connected to the first power line and extending in the first horizontal direction in the first row.Type: ApplicationFiled: March 5, 2019Publication date: November 21, 2019Inventors: Jung-ho Do, Ji-su Yu, Hyeon-gyu You, Seung-young Lee, Jae-boong Lee
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Publication number: 20190355750Abstract: An integrated circuit includes a standard cell. The standard cell may include a plurality of gate lines and a plurality of first wirings. The plurality of first wirings may include a clubfoot structure conductive pattern that includes a first conductive pattern and a second conductive pattern spaced apart from each other. Each of the first conductive pattern and the second conductive pattern may include a first line pattern extending in a first direction and a second line pattern protruding from one end of the first line pattern in a direction perpendicular to the first direction. The plurality of gate lines may be spaced apart from each other by a first pitch in the first direction, and the plurality of second wirings may be spaced apart from each other by a second pitch in the first direction. The first pitch may be greater than the second pitch.Type: ApplicationFiled: May 10, 2019Publication date: November 21, 2019Applicant: Samsung Electronics Co., Ltd.Inventors: Jung-ho Do, Ji-Su Yu, Hyeon-gyu You, Seung-Young Lee, Jae-Boong Lee, Jong-Hoon Jung
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Publication number: 20180365368Abstract: Provided is an integrated circuit including a plurality of standard cells each including a front-end-of-line (FEOL) region and a back-end-of-line (BEOL) region on the FEOL region, the FEOL region including at least one gate line extending in a first horizontal direction. A BEOL region of a first standard cell among the plurality of standard cells includes an eaves section not overlapping an FEOL region of the first standard cell in a vertical direction, the eaves section protruding in a second horizontal direction perpendicular to the first horizontal direction.Type: ApplicationFiled: March 23, 2018Publication date: December 20, 2018Applicant: Samsung Electronics Co., Ltd.Inventors: Jung-ho DO, Jong-hoon JUNG, Ji-su YU, Seung-young LEE, Tae-joong SONG, Jae-boong LEE
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Publication number: 20180294226Abstract: An integrated circuit including: a power rail including first and second conductive lines spaced apart from each other in a vertical direction, wherein the first and second conductive lines extend in parallel to each other in a first horizontal direction, and are electrically connected to each other, to supply power to a first standard cell, wherein the first and second conductive lines are disposed at a boundary of the first standard cell; and a third conductive line between the first and second conductive lines and extending in a second horizontal direction orthogonal to the first horizontal direction, to transfer an input signal or an output signal of the first standard cell.Type: ApplicationFiled: April 5, 2018Publication date: October 11, 2018Inventors: Jae-Boong Lee, Jung-Ho Do, Tae-Joong Song, Seung-Young Lee, Jong-Hoon Jung, Ji-Su Yu