Patents by Inventor Jae Cha

Jae Cha has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240154067
    Abstract: A unit pixel includes a transparent substrate, a plurality of light emitting devices arranged on the transparent substrate, and an optical layer disposed between the light emitting devices and the transparent substrate and transmitting light emitted from the light emitting devices. The transparent substrate has a concavo-convex pattern on a surface facing the light emitting devices.
    Type: Application
    Filed: December 11, 2023
    Publication date: May 9, 2024
    Inventors: Namgoo CHA, Sangmin KIM, Jung Hwan AHN, Jae Hee LIM
  • Patent number: 11961867
    Abstract: Various aspects of the present disclosure provide a semiconductor device, for example comprising a finger print sensor, and a method for manufacturing thereof. Various aspects of the present disclosure may, for example, provide an ultra-slim finger print sensor having a thickness of 500 ?m or less that does not include a separate printed circuit board (PCB), and a method for manufacturing thereof.
    Type: Grant
    Filed: June 10, 2022
    Date of Patent: April 16, 2024
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Jin Young Kim, No Sun Park, Yoon Joo Kim, Seung Jae Lee, Se Woong Cha, Sung Kyu Kim, Ju Hoon Yoon
  • Patent number: 11961872
    Abstract: A unit pixel includes a transparent substrate, a plurality of light emitting devices disposed on the transparent substrate, and an electrostatic discharge (ESD) protector disposed on the transparent substrate and protecting at least one of the light emitting devices from electrostatic discharge.
    Type: Grant
    Filed: April 28, 2021
    Date of Patent: April 16, 2024
    Assignee: SEOUL VIOSYS CO., LTD.
    Inventors: Namgoo Cha, Sang Min Kim, Jae Hee Lim
  • Publication number: 20240114163
    Abstract: Disclosed is an encoder which receives first to third input frames included first intra period and outputs a bitstream corresponding to the third input frame. The encoder includes a motion compensation unit that generates a first reference frame corresponding to the first input frame and a second reference frame corresponding to the second input frame, a union operation unit that generates an overlap frame by performing a union operation based on the first reference frame and the second reference frame, and an inter prediction unit that generates an occupancy code by performing an inter prediction operation on the overlap frame and the third input frame. In this case, the bitstream includes the occupancy code.
    Type: Application
    Filed: September 15, 2023
    Publication date: April 4, 2024
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Eun Young CHANG, Euee S JANG, Xin LI, Jihun CHA, Tianyu DONG, Jae Young AHN
  • Patent number: 11950158
    Abstract: The present invention relates to a method and device for distributing idle UE by a carrier in eNB of a multi-carrier based mobile communication system. The method of distributing idle UE in a multi-carrier based mobile communication system according to the present invention includes a process of determining a search rate by a carrier on the basis of information representing load on the carrier, a step of determining a cell reselection priority on the idle UE on the basis of the determined search rate, and a process of transmitting the determined cell reselection priority to the idle UE.
    Type: Grant
    Filed: August 23, 2021
    Date of Patent: April 2, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeong-Jae Won, Dae-Joong Kim, Han-Seok Kim, Abhishek Roy, Hwa-Jin Cha, Jung-Min Choi
  • Patent number: 11949055
    Abstract: A unit pixel includes a transparent substrate, a plurality of light emitting devices arranged on the transparent substrate, connection layers electrically connected to the light emitting devices, and bonding pads disposed over the connection layers and electrically connected to the connection layers. The bonding pads are partially overlapped with at least one of the light emitting devices in a vertical direction, respectively.
    Type: Grant
    Filed: May 17, 2021
    Date of Patent: April 2, 2024
    Assignee: SEOUL VIOSYS CO., LTD.
    Inventors: Namgoo Cha, Sang Min Kim, Seongchan Park, Yeonkyu Park, Jae Hee Lim, Jinkyu Jang
  • Publication number: 20230332079
    Abstract: The present disclosure relates to a biomimetic chip for three-dimensionally simulating an endometrium, and an endometrium simulating method using the biomimetic chip. The biomimetic chip according to an embodiment of the present disclosure is a three-dimensional biomimetic chip including a plate, a plurality of chambers, and a plurality of posts, which are arranged between the plurality of chambers, wherein the plurality of chambers include channels in which different cells are cultured, are arranged on the plate to be parallel to each other in one direction, and are arranged adjacent to each other such that at least some sections communicate with each other.
    Type: Application
    Filed: June 23, 2021
    Publication date: October 19, 2023
    Applicants: CHA UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATION, SUNGKWANG MEDICAL FOUNDATION
    Inventors: Youn Jung KANG, Jung Ho AHN, Min Ji YOON, Hwi Jae CHA, Seon Hwa HONG
  • Publication number: 20160209207
    Abstract: In order to inspect a board, first, a board prior to mounting an element on the board by a mounter is transferred to a work stage. Then, warpage of the board is inspected. Thereafter, in case that the board is judged good as a result of the inspection, the board is transferred to the mounter, and in case that the board is judged no good as the result of the inspection, the board is finally determined no good without transferring the board to the mounter. Thus, unnecessary works and defective products may be prevented beforehand, and productivity and efficiency of inspection may be increased.
    Type: Application
    Filed: August 25, 2014
    Publication date: July 21, 2016
    Applicant: KOH YOUNG TECHNOLOGY INC.
    Inventors: Hee-Tae KIM, Yong-Keun AHN, Won-Jae CHA
  • Publication number: 20100183150
    Abstract: A shared key management method for a Supervisory Control And Data Acquisition (SCADA) system in which a master terminal unit (MTU), a plurality of sub master terminal units (SUB-MTUs), and a plurality of remote terminal units (RTUs) are configured in a sequential hierarchy, is provided.
    Type: Application
    Filed: March 31, 2009
    Publication date: July 22, 2010
    Applicant: The Industry & Academic Cooperation in Chungnam National University(IAC)
    Inventors: Sung-jin Lee, Seung-joo Kim, Dong-ho Won, Dong-hyun Choi, Kwang-woo Lee, Byung-hee Lee, Han-jae Jeong, Woong-ryul Jeon, Soon-haeng Hur, Wook-jae Cha, Sung-kyu Cho, Hyun-sang Park, Hyoung-seob Lee, Hyun-seung Lee, Song-yi Kim, Young-jun Cho
  • Publication number: 20100165892
    Abstract: Disclosed is an apparatus and a method for implementing efficient redundancy and an expanded service coverage in a Radio Access Station (RAS) system. In the RAS system, if the main processor unit generates switching control signals in response to the sensed failures on sensing a failure in any of the channel cards and the transceivers or a failure in any of the high-power amplifiers, all supporting M (i.e., the number of FAs equal to or more than three) and K (i.e., the number of sectors equal to or more than three), between the transceivers and the predetermined Time Division Duplex (TDD) switches connected to the antennas, the RF switch unit switches a path based on the generated switching control signals so as to substitute the failed module either by one additional redundancy transceiver per M and K or by one additional redundancy high-power amplifier per M and K. As a result, an efficient N+1 redundancy structure is embodied.
    Type: Application
    Filed: February 26, 2007
    Publication date: July 1, 2010
    Applicant: POSDATA CO., LTD.
    Inventors: Young-Jae Cha, Mun-Kyu Lee
  • Publication number: 20090231170
    Abstract: Disclosed is an apparatus and a method for down-converting frequencies of an input signal by separating the signal to which at least two frequencies are allocated according to each frequency, and then outputting at least two digital IF signals in a communication system. The digital down-converting apparatus includes a band-pass filter, an analog-to-digital converter, down-converters, up-converters, and Serializer/Deserializeres, etc. First, the signal to which at least two frequencies are allocated is down-converted into baseband signals respectively. Then, the baseband signals are up-converted into signals of a predetermined frequency respectively.
    Type: Application
    Filed: March 30, 2007
    Publication date: September 17, 2009
    Applicant: Posdata Co., Ltd
    Inventors: Yo-An Jung, Young-Jae Cha
  • Publication number: 20090154448
    Abstract: Disclosed is a transmitting and receiving apparatus and method in a communication system. The transmitting and receiving apparatus and method can provide a data service for exchanging user data including characters, images, computer files, messages, etc. as well as voice over a voice physical channel for providing a voice service in a wireless communication system including IS-95A/B, CDMA 1x, GSM and W-CDMA and in a communication system including a voice service for providing a VoIP service through a wired/wireless packet network. That is, the transmitting and receiving apparatus and method can provide a data service which transfers user data information while a voice service is provided or plays a game etc. during a call.
    Type: Application
    Filed: October 20, 2005
    Publication date: June 18, 2009
    Applicant: MIRACOM TECHNOLOGY CO., LTD
    Inventors: Seung-Hwan Lee, Won-Jae Cha, Sang-Jeom Lee
  • Publication number: 20070285995
    Abstract: A memory device capable of detecting its failure, the memory device includes a data input section for receiving data applied from an external part of the memory device; a latch section for receiving and storing therein the data which have passed through the data input section; memory cell arrays for storing therein the data which have passed through the data input section; and a data compressor for determining whether or not the data stored in the latch section and the data stored in the memory cell arrays are identical to each other.
    Type: Application
    Filed: August 23, 2007
    Publication date: December 13, 2007
    Inventors: Jae CHA, Geun LEE
  • Publication number: 20070132908
    Abstract: The present invention relates to a flat panel display having integral fastening structures for holding the top and bottom chassis. The flat panel display comprises a mold frame enclosing an internal storage space and having a plurality of fastening hooks protruding outward from a side surface thereof; a bottom chassis having a plurality of first coupling openings fastened to the plurality of fastening hooks of the mold frame; and a top chassis having a fastening structure fastened to the bottom chassis, wherein the fastening structure is formed on the area where the mold frame is fastened to the bottom chassis.
    Type: Application
    Filed: October 19, 2006
    Publication date: June 14, 2007
    Inventors: Jae Kim, Chung Suh, Young Chu, Jae Cha, Jeung Kim
  • Publication number: 20060283283
    Abstract: Disclosed herein is a shaft and hub coupling structure for recliners. The shaft and hub coupling structure of the present invention ensures stable and silent motion of the shaft and the hub, maintains sufficient strength of the shaft, and makes it possible for a process of coupling the shaft to the hub to be easily and correctly conducted.
    Type: Application
    Filed: December 22, 2005
    Publication date: December 21, 2006
    Inventors: Gi Jeong, Jae Cha
  • Publication number: 20060181924
    Abstract: A non-volatile memory device includes a memory cell array including memory cells, each memory cell being defined at an intersection of a word line and a bit line. A page buffer is coupled to the memory cell array via a sensing line. The page buffer comprises a first latch unit including a first latch circuit and coupled to the sensing line, the first latch unit being configured to be activated during a copy-back program operation to read data stored in a first memory cell and reprogram the data to a second memory cell that is different from the first memory cell.
    Type: Application
    Filed: December 7, 2005
    Publication date: August 17, 2006
    Applicant: Hynix Semiconductor Inc.
    Inventor: Jae Cha
  • Publication number: 20060104127
    Abstract: A memory device capable of detecting its failure, the memory device includes a data input section for receiving data applied from an external part of the memory device; a latch section for receiving and storing therein the data which have passed through the data input section; memory cell arrays for storing therein the data which have passed through the data input section; and a data compressor for determining whether or not the data stored in the latch section and the data stored in the memory cell arrays are identical to each other.
    Type: Application
    Filed: May 5, 2005
    Publication date: May 18, 2006
    Inventors: Jae Cha, Geun Lee
  • Publication number: 20050232033
    Abstract: Provided is directed to a data input apparatus and a method of DDR SDRAM which can improve reliability of a circuit operation by transferring data inputted after applying a data strobe signal DQS to an input/output bus GIO by a exact timing, by means of correctly arranging the data strobe signal DQS and a data input strobe pulse dinstbp regardless of time difference of inputting the data strobe signal DQS after a write command, in response to generating a data input strobe pulse dinstbp used to load data to the input/output bus GIO as a data strobe pulse dsp identical to the data strobe signal DQS.
    Type: Application
    Filed: June 28, 2004
    Publication date: October 20, 2005
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventor: Jae Cha
  • Patent number: 6721576
    Abstract: An apparatus for controlling a global positioning system (GPS) reference signal to be provided to a base station modem is disclosed to expand a coverage area of a base station, which comprises a GPS clock reception block for generating a system clock and a pp2s signal based on a reference time from the GPS; a system clock distribution block for distributing the system clock received from the clock reception block; a clock generation block for receiving the pp2s signal and generating a clock signal as base station synchronous signals for the expansion of the coverage area; a base station modem block with a multiplicity of base station modems, for performing data modulation/demodulation in synchronism with a corresponding clock signal; a CPU for generating a control signal; and a controller for allowing the data to be transmitted to a selected one among the base station modems, in response to the control signal.
    Type: Grant
    Filed: January 26, 2001
    Date of Patent: April 13, 2004
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventors: Hong-Koo Kang, Young-Jae Cha
  • Patent number: D647355
    Type: Grant
    Filed: April 27, 2010
    Date of Patent: October 25, 2011
    Assignee: The Coca-Cola Company
    Inventors: Claudio Ponzio, Ion Setran, Paul Bosveld, Vince Voron, Jae Cha