Abstract: There is provided an electronic component module capable of increasing a degree of integration by mounting electronic component on both surfaces of a substrate, the module including: a first substrate having mounted electrodes formed on both surfaces thereof; a plurality of electronic components mounted on both surfaces of the first substrate; at least one second substrate bonded to a lower surface of the first substrate; and an insulating part formed in at least one position in a gap between the first substrate and the second substrate and bonding the first substrate to the second bonding substrate.

Abstract: A semiconductor package and a method of manufacturing the semiconductor package are disclosed. A semiconductor package in accordance with an embodiment of the present invention includes a substrate, which has a ground circuit formed thereon, a semiconductor chip, which is mounted on the substrate, a conductive first shield, which is formed on an upper surface of the semiconductor chip and connected with the ground circuit, and a conductive second shield, which covers the substrate and the semiconductor chip and is connected with the first shield. With a semiconductor package in accordance with an embodiment of the present invention, grounding is possible between semiconductor chips because a shield is also formed on an upper surface of the semiconductor chip, and the shielding property can be improved by a double shielding structure.

Abstract: There are provided an electronic component module in which electronic components are mounted on both surfaces of a substrate to increase integration density, and a method of manufacturing the same, the electronic component module including a first substrate; a plurality of electronic components mounted on both surfaces of the first substrate; a second substrate bonded to a lower surface of the first substrate; and a molded part formed on the lower surface of the first substrate and having the second substrate embedded therein.

Abstract: There is provided an electronic component module capable of increasing a degree of integration by mounting electronic component on both surfaces of a substrate, the module including: a first substrate having mounted electrodes formed on both surfaces thereof; a plurality of electronic components mounted on both surfaces of the first substrate; at least one second substrate bonded to a lower surface of the first substrate; and an insulating part formed in at least one position in a gap between the first substrate and the second substrate and bonding the first substrate to the second bonding substrate.

Abstract: An electronic component package includes: a first insulation layer; an electronic component mounted in one surface of the first insulation layer; a heat sink formed with a cavity corresponding to the electronic component, bonded to the one surface of the first insulation layer to cover the electronic component, and formed with an inset hole and with an inlet hole; an adhesive charged in the cavity; and a circuit pattern formed in another surface of the first insulation layer.

Abstract: Disclosed herein is a 3D power module package, including: a power converting unit packaged to include a heat radiating substrate, a power device connected to the heat radiating substrate, and a lead frame; a controlling unit packaged to include a controlling unit substrate and IC and controlling devices mounted on an upper portion of the controlling unit substrate; and an electrical connecting unit electrically connecting the packaged power converting unit and the packaged controlling unit.

Abstract: An electronic component package and a manufacturing method thereof are disclosed. The electronic component package manufacturing method, which includes mounting an electronic component in one surface of a first insulation layer; bonding a heat sink to the one surface of the first insulation layer, corresponding to the electronic component, to cover the electronic component, the heat sink being formed with a cavity; charging the cavity with an adhesive; and forming a circuit pattern in the other surface of the first insulation layer, can prevent a void from being generated in the adhesive, make the handling stable and make the size small by allowing the heat sink formed with the cavity to cover the electronic component before the pattern build-up and supplying the adhesive through one side of the cavity while providing negative pressure through the other side.

Abstract: An apparatus for inspecting defects in a circuit pattern is described. The apparatus includes at least one laser unit for radiating a laser beam onto a first end of a circuit pattern formed on a substrate. The apparatus also includes a capacitor sensor disposed opposite a second end of the circuit pattern, which is connected to the first end of the circuit pattern through a via hole, in a non-contact manner. The apparatus also includes a voltage source connected to the capacitor sensor and configured to apply a voltage. The apparatus also includes a measurement unit connected to the capacitor sensor and configured to detect variation in impedance generated in the capacitor sensor.

Abstract: The present invention relates to a power device package module and a manufacturing method thereof. In one aspect of the present invention, a power device package module includes: a control unit a first lead frame, a control chip and a first coupling portion that are mounted on a first substrate, wherein the first lead frame and the first coupling portion are electrically connected to the control chip, and individually molded; and a power unit including a second lead frame, a power chip and a second coupling portion that are mounted on a second substrate, wherein the second lead frame and the second coupling portion are electrically connected to the power chip, and individually molded, wherein the individually molded control unit and power unit are coupled by the first coupling portion and the second coupling portion.

Abstract: Disclosed herein is a 3D power module package, including: a power converting unit packaged to include a heat radiating substrate, a power device connected to the heat radiating substrate, and a lead frame; a controlling unit packaged to include a controlling unit substrate and IC and controlling devices mounted on an upper portion of the controlling unit substrate; and an electrical connecting unit electrically connecting the packaged power converting unit and the packaged controlling unit.

Abstract: A semiconductor package and a method of manufacturing the semiconductor package are disclosed. A semiconductor package in accordance with an embodiment of the present invention includes a substrate, which has a ground circuit formed thereon, a semiconductor chip, which is mounted on the substrate, a conductive first shield, which is formed on an upper surface of the semiconductor chip and connected with the ground circuit, and a conductive second shield, which covers the substrate and the semiconductor chip and is connected with the first shield. With a semiconductor package in accordance with an embodiment of the present invention, grounding is possible between semiconductor chips because a shield is also formed on an upper surface of the semiconductor chip, and the shielding property can be improved by a double shielding structure.

Abstract: In one embodiment, a miniaturized solid-state imaging apparatus includes a body having a cavity for mounting a semiconductor chip therein. The body has an overhanging portion extending toward the cavity. Further, a lead is disposed within the body. The lead has one end exposed through a top surface of the body and the other end exposed through a bottom surface of the body for electrical connection thereof.

Abstract: Disclosed herein is an apparatus and method for inspecting defects in a circuit pattern. In the inspection apparatus and method, a laser beam is radiated by a laser unit onto a first end of a circuit pattern, and variation in impedance of a capacitor sensor disposed at a second end of the circuit pattern is measured, thus measuring the open/short circuits of the circuit pattern. Accordingly, the inspection apparatus and method are advantageous in that defects in the circuit pattern can be measured in a non-contact manner, so that the consumption of pin probes can be reduced, and the reliability of the measurement of defects in the circuit pattern can be improved.

Abstract: In one embodiment, a miniaturized solid-state imaging apparatus includes a body having a cavity for mounting a semiconductor chip therein. The body has an overhanging portion extending toward the cavity. Further, a lead is disposed within the body. The lead has one end exposed through a top surface of the body and the other end exposed through a bottom surface of the body for electrical connection thereof.

Abstract: Provided is a wafer level package fabrication method. The method includes providing a device substrate wafer including one or more devices on an upper surface thereof, and a bonding pad electrically connected to the device, providing a bonding seal surrounding the device along the bonding pad, bonding a cap substrate wafer to the device substrate wafer through the bonding seal, the cap substrate wafer having a via formed in a region corresponding to the bonding pad, forming an external terminal on the cap substrate wafer, the external terminal being electrically connected to the bonding pad, and cutting the cap substrate wafer and the device substrate wafer along a cutting line to individually separate a plurality of wafer level packages. The method is conducive to reducing product size for miniaturization, is capable of performing a bonding process without wafer deformation or damage, and increases freedom in wafer material selection.

Abstract: Semiconductor package films and a display module comprising a packaged semiconductor device punched from a semiconductor package film are provided. In one embodiment, the invention provides a semiconductor package film comprising a base film comprising a plurality of semiconductor device regions, an intermediate region disposed on a first surface of the base film and disposed between two semiconductor device regions, and a reinforcing member attached to a second surface of the base film opposite the first surface of the base film and attached opposite the intermediate region. Each semiconductor device region comprises a semiconductor mounting region adapted to receive a semiconductor chip, and first and second metal line regions.

Abstract: Provided is a method for manufacturing a semiconductor package. In the method, a wafer for a cap substrate is provided. The wafer for the cap substrate includes a plurality of vias and via electrodes on a lower surface. A wafer for a device substrate is provided. The wafer for the device substrate includes a circuit unit and a connection electrode on an upper surface. The wafer for the cap substrate and the wafer for the device substrate are primarily bonded by a medium of a primary adhesive. A trench is formed to expose the upper surface of the wafer for the device substrate to an outside along an outer edge of the primary adhesive. A secondary bonding operation is performed by a medium of a secondary adhesive to electrically connect the via electrode and the connection electrode. The wafer for the device substrate is diced along a virtual cut line.

Abstract: In one embodiment, a miniaturized solid-state imaging apparatus includes a body having a cavity for mounting a semiconductor chip therein. The body has an overhanging portion extending toward the cavity. Further, a lead is disposed within the body. The lead has one end exposed through a top surface of the body and the other end exposed through a bottom surface of the body for electrical connection thereof.

Abstract: The invention involves an image sensor camera module and a method of fabricating the image sensor camera module. The image sensor camera module uses a single-body type lens holder defined by a hollow cylindrical body having a shoulder protruding radially inwardly from an inner surface thereof. First and second lenses therein are spaced apart by a first spacer and a filter therein is spaced from the second lens by a second spacer. An image sensor is adhered to a lower rim of the body, and the filter is adhered to an upper rim thereof. All optical elements within the lens holder thus are affixed in fixed relative position compatible with a predefined focal length and axis. Moreover, the adhesively sealed interior of the body of the image sensor camera module prevents particulate contamination.

Abstract: Provided is a wafer level package of an image sensor capable of simply and easily packaging an image sensor in a packaging process, and a method for manufacturing the same. The wafer level package of an image sensor includes a lower substrate including an image sensor, a conductive pattern coupled to the image sensor, and a plurality of vias coupled to the conductive pattern; a micro lens array film having a plurality of micro lenses corresponding to the image sensor, the micro lenses being formed on the lower substrate; and a sealing line surrounding the image sensor while being spaced apart from the image sensor and being in contact with an upper substrate.