Abstract: A video shuffling apparatus shuffles video data in a memory having a storage capacity of video data of one frame, based on a shuffling system of digital video cassette recorder (VCR) standard. A first address generation unit generates a first interlace address and a first shuttle address according to interlace addressing shuffle addressing based on the shuffling system of the VCR standard. A second address generation unit generates a second interlace address and a second shuffle address having relationship that a second shuffle address for reading out video data of a previous frame from the memory is the same as a second interlace address for writing video data of a current frame in the memory, and a second shuffle address for reading out video data of the current frame from the memory is the same as a second interlace address for writing video data of next frame in the memory.