Abstract: An apparatus for generating a roll map of a merge-wound electrode includes a position measurement device configured to acquire coordinate value data for a longitudinal position of an electrode according to an amount of rotation of the rewinder. The apparatus includes an input device configured to input an input signal indicating a start of merge-winding or an end of merge-winding, a seam detector configured to detect a seam, a reference point detector configured to detect a plurality of reference points of the merge-wound electrode, and a roll map generator configured to generate a roll map for simulating the merge-wound electrode moving in a roll-to-roll state based on the input signal of the input device, and to display the longitudinal coordinate values of the electrode, the electrode coordinate values of the seam, and the electrode coordinate values of the plurality of reference points of the merge-wound electrode on the roll map.

Abstract: An electrode connection cause determination system includes a position measuring instrument. The position measuring instrument is configured to, when an electrode moves between an unwinder and a rewinder in a roll-to-roll state, acquire coordinate value data based on a longitudinal position of the electrode determined according to a rotation amount of the rewinder. The system includes a signal generator configured to generate a connection advance notice signal if the electrode includes a connecting portion corresponding to a cause event, a seam detector configured to detect a seam attached onto the electrode after the connection advance notice signal is generated, and a determination unit configured to, when the seam is detected within a predetermined distance from a first coordinate value of the electrode after the connection advance notice signal is generated, determine that a connection cause of an electrode connection by the seam corresponds to the cause event.

Abstract: A method for controlling driving of a hybrid electric vehicle includes collecting driving data while the hybrid electric vehicle is driven, determining whether the hybrid electric vehicle enters a first mode corresponding to emergency driving of the hybrid electric vehicle or a second mode corresponding to control in preparation for the emergency driving, and controlling the hybrid electric vehicle in accordance with a mode that the hybrid electric vehicle enters among the first mode and the second mode.

Abstract: A semiconductor memory device includes a plurality of bit lines disposed over memory cells along a second direction intersecting with a first direction, and extending in the first direction; and a plurality of s first wirings and a plurality of second wirings alternately disposed along the second direction over the bit lines, and extending in the first direction while being bent into zigzag shapes.

Abstract: A semiconductor memory device includes a plurality of bit lines disposed over memory cells along a second direction intersecting with a first direction, and extending in the first direction; and a plurality of first wirings and a plurality of second wirings alternately disposed along the second direction over the bit lines, and extending in the first direction while being bent into zigzag shapes.

Abstract: Provided herein is a semiconductor memory device including: a memory cell array having a multilayer stacked structure; and a peripheral circuit configured to drive the memory cell array. The peripheral circuit includes a power decoupling capacitor circuit configured to provide decoupling capacitors to the memory cell array and the peripheral circuit. The power decoupling capacitor circuit includes conductive lines which are alternately stacked on top of one another, a plurality of semiconductor pillars configured to pass through the conductive lines, a horizontal connector configured to connect the semiconductor pillars to each other, and a vertical connector configured to pass through the conductive lines and insulated from the horizontal connector.

Abstract: Provided herein is a semiconductor memory device including: a memory cell array having a multilayer stacked structure; and a peripheral circuit configured to drive the memory cell array. The peripheral circuit includes a power decoupling capacitor circuit configured to provide decoupling capacitors to the memory cell array and the peripheral circuit. The power decoupling capacitor circuit includes conductive lines which are alternately stacked on top of one another, a plurality of semiconductor pillars configured to pass through the conductive lines, a horizontal connector configured to connect the semiconductor pillars to each other, and a vertical connector configured to pass through the conductive lines and insulated from the horizontal connector.

Abstract: A semiconductor device and a method of fabricating the same are disclosed. The semiconductor device includes: a memory cell structure formed over a semiconductor substrate; a channel portion formed in the semiconductor substrate; a through-hole formed to pass through the memory cell structure; a first channel region formed over sidewalls of the through-hole; and a second channel region formed at a center part of the through-hole, and spaced apart from the first channel region, wherein each of the first channel region and the second channel region is coupled to the channel portion.

Abstract: A nonvolatile memory device includes a source line having a shape of a three-dimensional (3D) cap. The nonvolatile memory device includes a first vertical channel and a second vertical channel, a source contact disposed over the first vertical channel, a drain contact disposed over the second vertical channel, a source-line barrier disposed between the source contact and the drain contact, and a source-line plate coupling the source contact and the source-line barrier.

Abstract: A semiconductor device and a method of fabricating the same are disclosed. The semiconductor device includes: a memory cell structure formed over a semiconductor substrate; a channel portion formed in the semiconductor substrate; a through-hole formed to pass through the memory cell structure; a first channel region formed over sidewalls of the through-hole; and a second channel region formed at a center part of the through-hole, and spaced apart from the first channel region, wherein each of the first channel region and the second channel region is coupled to the channel portion.

Abstract: A nonvolatile memory device includes a source line having a shape of a three-dimensional (3D) cap. The nonvolatile memory device includes a first vertical channel and a second vertical channel, a source contact disposed over the first vertical channel, a drain contact disposed over the second vertical channel, a source-line barrier disposed between the source contact and the drain contact, and a source-line plate coupling the source contact and the source-line barrier.

Abstract: A semiconductor device is provided having an electrostatic discharge (ESD) protection function. It includes a plurality of no-connection (NC) pads, each associated with a corresponding NC ball, and each connected to a corresponding internal circuit, an ESD protection circuit connected to each one of the plurality of NC pads, and a fuse located between each respective NC pad and its corresponding internal circuit.