Abstract: Electronic devices may include time-of-flight image pixels. A time-of-flight image pixel may include first and second charge storage regions coupled to a photosensor and a transfer transistor with a gate terminal coupled to the first storage region. An electronic device may further include a light pulse emitter configured to emit pulses of light to be reflected by objects in a scene. Reflected portions of the emitted pulses of light may be captured along with background light by the time-of-flight image pixels. Time-of-flight image pixels may be configured sense the time-of-flight of the reflected portions of the emitted pulses. The electronic device may include processing circuitry configured to use the sensed time-of-flight of the reflected portions to generate depth images of a scene. Depth images may include depth-image pixel values that contain information corresponding to the distance of the objects in the scene from the electronic device.

Abstract: Electronic devices may include time-of-flight image pixels. A time-of-flight image pixel may include first and second charge storage regions coupled to a photosensor and a transfer transistor with a gate terminal coupled to the first storage region. An electronic device may further include a light pulse emitter configured to emit pulses of light to be reflected by objects in a scene. Reflected portions of the emitted pulses of light may be captured along with background light by the time-of-flight image pixels. Time-of-flight image pixels may be configured sense the time-of-flight of the reflected portions of the emitted pulses. The electronic device may include processing circuitry configured to use the sensed time-of-flight of the reflected portions to generate depth images of a scene. Depth images may include depth-image pixel values that contain information corresponding to the distance of the objects in the scene from the electronic device.

Abstract: The present invention relates to a semiconductor device with a device isolation structure and a method for fabricating the same. The semiconductor device includes: a substrate provided with a trench formed in the substrate; and at least one device isolation structure including an oxide layer formed on the trench, a nitride layer formed on the oxide layer disposed on sidewalls of the trench and a high density plasma oxide layer formed on the nitride layer to fill the trench.

Abstract: The present invention relates to a semiconductor device with a device isolation structure and a method for fabricating the same. The semiconductor device includes: a substrate provided with a trench formed in the substrate; and at least one device isolation structure including an oxide layer formed on the trench, a nitride layer formed on the oxide layer disposed on sidewalls of the trench and a high density plasma oxide layer formed on the nitride layer to fill the trench.

Abstract: The present invention relates to a semiconductor device with a device isolation structure and a method for fabricating the same. The semiconductor device includes: a substrate provided with a trench formed in the substrate; and at least one device isolation structure including an oxide layer formed on the trench, a nitride layer formed on the oxide layer disposed on sidewalls of the trench and a high density plasma oxide layer formed on the nitride layer to fill the trench.

Abstract: The method for manufacturing an STI in a semiconductor device with an enhanced gap-fill property and leakage property is disclosed by introducing a nitridation process instead of forming a liner nitride. The method includes steps of: preparing a semiconductor substrate obtained by a predetermined process on which a pad oxide and a pad nitride are formed on predetermined locations thereof; forming an isolation trench with a predetermined depth in the semiconductor substrate; forming a wall oxide on the trench; forming a liner oxide on the wall oxide and an exposed surface of the pad nitride; carrying out a nitridation process for forming a nitrided oxide; forming an insulating layer over the resultant structure, wherein the isolation trench is filled with the insulating layer; and planarizing a top face of the insulating layer.

Abstract: The present invention relates to a semiconductor device with a device isolation structure and a method for fabricating the same. The semiconductor device includes: a substrate provided with a trench formed in the substrate; and at least one device isolation structure including an oxide layer formed on the trench, a nitride layer formed on the oxide layer disposed on sidewalls of the trench and a high density plasma oxide layer formed on the nitride layer to fill the trench.

Abstract: Disclosed is a method for isolating semiconductor devices. The method includes the steps of: forming a semi-finished substrate provided with a trench and a patterned pad nitride layer on a substrate; forming a first oxide layer on at least one portion of the trench; forming a second oxide layer on the first oxide layer and the patterned pad nitride layer; forming a nitride layer on the second oxide layer; forming an isolation oxide layer on the second oxide layer; and etching the isolation oxide layer, wherein the second oxide layer serves as an etch stop for the nitride layer.

Abstract: The method for manufacturing an STI in a semiconductor device with an enhanced gap-fill property and leakage property is disclosed by introducing a nitridation process instead of forming a liner nitride. The method includes steps of: preparing a semiconductor substrate obtained by a predetermined process on which a pad oxide and a pad nitride are formed on predetermined locations thereof; forming an isolation trench with a predetermined depth in the semiconductor substrate; forming a wall oxide on the trench; forming a liner oxide on the wall oxide and an exposed surface of the pad nitride; carrying out a nitridation process for forming a nitrided oxide; forming an insulating layer over the resultant structure, wherein the isolation trench is filled with the insulating layer; and planarizing a top face of the insulating layer.

Abstract: Disclosed is a method for fabricating a semiconductor device, especially suitable for a highly-integrated semiconductor device. In the method, a lower tungsten silicide film having an amorphous construction is formed on a poly silicon film on a gate oxide film formed on a semiconductor substrate. On the lower tungsten silicide film, an upper tungsten silicide film having a plurality of small grains between which gaps are defined. Thereafter, oxide films are formed on the crystallized grains by heat treatment under an oxygen atmosphere.