Patents by Inventor Jae Geun Park

Jae Geun Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230073433
    Abstract: A positive electrode material, a positive electrode including the same, and a lithium secondary battery including the same are disclosed herein. In some embodiments, a positive electrode material includes a first positive electrode active material having a larger average particle diameter than a second positive electrode active material, wherein the first positive electrode active material and the second positive electrode active material are each independently a lithium transition metal oxide having a molar ratio of nickel of 80 mol % or more relative to the total molar amount of transition metals in the lithium transition metal oxide, and the positive electrode material satisfies Equation (1): 0<{(B?A)/B}×100?10 ??Equation (1): wherein, in Equation (1), A denotes a particle strength of the first positive electrode active material, and B denotes a particle strength of the second positive electrode active material.
    Type: Application
    Filed: March 18, 2021
    Publication date: March 9, 2023
    Applicant: LG Chem, Ltd.
    Inventors: Woo Ram Lee, Jun Ho Eom, Na Ri Park, Dong Ryoung Kang, Jae Geun Kim
  • Patent number: 11587222
    Abstract: A method for clustering based on unsupervised learning according to an embodiment of the invention enables clustering for newly generated patterns and is robust against noise, and does not require tagging for training data. According to one or more embodiments of the invention, noise is accurately removed using three-dimensional stacked spatial auto-correlation, and multivariate spatial probability distribution values and polar coordinate system spatial probability distribution values are used as learning features for clustering model generation, making them robust to noise, rotation, and fine unusual shapes. In addition, clusters resulting from clustering are classified into multi-level clusters, and stochastic automatic evaluation of normal/defect clusters is possible only with measurement data without a label.
    Type: Grant
    Filed: May 27, 2020
    Date of Patent: February 21, 2023
    Assignee: SAMSUNG SDS CO., LTD.
    Inventors: Min Sik Chu, Seong Mi Park, Jiin Jeong, Jae Hoon Kim, Kyong Hee Joo, Ho Geun Park, Baek Young Lee
  • Publication number: 20230003800
    Abstract: A contact test device for a hi-pot test includes: a contact test device connected to a hi-pot test device in parallel by lines branched from first and second lines of the hi-pot test device by being connected to first and second terminals of a battery through first and second probes, respectively, and having third and fourth probes directly connected to the first and second terminals, wherein the contact test device includes: a first closed loop including first to third switch units, a direct current (DC) voltage source and a first continuity detection unit; a second closed loop including fourth to sixth switch units, the DC voltage source and a second continuity detection unit; and a control unit controlling turning the first to sixth switch units on and off and detecting a continuity signal of each of the first and second continuity detection units.
    Type: Application
    Filed: May 5, 2022
    Publication date: January 5, 2023
    Inventors: Jae Geun JEON, Kyeong Tae Park
  • Patent number: 11542577
    Abstract: A magnesium alloy sheet according to an embodiment of the present invention includes greater than 3 wt % and less than or equal to 5 wt % of Al, 0.5 wt % to 1.5 wt % of Zn, 0.1 wt % to 0.5 wt % of Mn, 0.001 wt % to 0.01 wt % of B, 0.1 wt % to 0.5 wt % of Y, a balance amount of magnesium, and other inevitable impurities on the basis of a total of 100 wt %.
    Type: Grant
    Filed: December 3, 2018
    Date of Patent: January 3, 2023
    Assignee: POSCO HOLDINGS INC.
    Inventors: Jae Sin Park, Taek Geun Lee, Dae Hwan Choi, Bae Mun Seo, Hye Ji Kim, Jonggeol Kim, Hye Jeong Kim, Yoonsuk Oh, Jae Eock Cho, Dong Kyun Choo
  • Patent number: 11544476
    Abstract: A method for model customization according to an embodiment includes providing a user with prediction results of each of a plurality of pre-trained natural language processing models for a document subjected to analysis selected from a document set including a plurality of documents, acquiring user feedback on the prediction results from the user, generating a plurality of augmented documents from at least one of the plurality of documents based on data attributes of each of the plurality of documents and the user feedback; and retraining at least one of the plurality of natural language processing models, using training data including the plurality of augmented documents.
    Type: Grant
    Filed: May 27, 2020
    Date of Patent: January 3, 2023
    Assignee: SAMSUNG SDS CO., LTD.
    Inventors: Na Un Kang, Jae Hoon Lee, Wang Geun Park, Jea Hyun Park
  • Patent number: 11522736
    Abstract: An analog front-end receiver including a termination resistor configured to receive first and second differential signals from different data lines, the second differential signal being differential with respect to the first differential signal, an active equalizer configured to receive a first input differential signal through a first input node and a second input differential signal through a second input node, the first and second input differential signals both having an input common mode voltage, the first and second input differential signals being based on the first and second differential signal, respectively, and output first and output differential signals to first and second output nodes, respectfully, the second output differential signal being differential with respect to the first output differential signal, and an input common mode voltage generator configured to adjust the input common mode voltage to be equal to an output common mode voltage of the first output differential signal.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: December 6, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Byeong Gyu Park, Jun Han Bae, Yun Geun Nam, Jae Hyun Park, Gyeong Seok Song, Ho-Bin Song
  • Publication number: 20220374164
    Abstract: A storage device set includes a storage device configured to communicate with a host, the storage device including a controller configured to generate encrypted input data by encrypting data; and a reconfigurable logic chip configured to receive the encrypted input data from the storage device, generate processed data by processing the encrypted input data according to a configuration, and generate encrypted output data by encrypting the processed data.
    Type: Application
    Filed: August 2, 2022
    Publication date: November 24, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jae-geun PARK, Phil-yong JUNG, Ho-jun SHIM, Sang-young YE
  • Patent number: 11461043
    Abstract: A storage device set includes a storage device configured to communicate with a host, the storage device including a controller configured to generate encrypted input data by encrypting data; and a reconfigurable logic chip configured to receive the encrypted input data from the storage device, generate processed data by processing the encrypted input data according to a configuration, and generate encrypted output data by encrypting the processed data.
    Type: Grant
    Filed: October 23, 2020
    Date of Patent: October 4, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-geun Park, Phil-yong Jung, Ho-jun Shim, Sang-young Ye
  • Publication number: 20220247071
    Abstract: Disclosed is a UWB antenna module arranged in the lateral direction of a portable terminal so as to prevent deterioration of communication performance while minimizing a mounting space. The disclosed UWB antenna module comprises: a planar base substrate; a plurality of radiation patterns arranged on the upper surface of the base substrate, and arranged so as to be spaced from each other; a switching element arranged on the lower surface of the base substrate and connected to the plurality of radiation patterns; and a communication chipset arranged to be spaced from the switching element on the lower surface of the base substrate, and connected to one of the plurality of radiation patterns through a switching operation of the switching element.
    Type: Application
    Filed: July 10, 2020
    Publication date: August 4, 2022
    Applicant: AMOSENSE CO.,LTD
    Inventors: Kyung Hyun RYU, Hyung Il BAEK, Yun Sik SEO, Jeong Geun HEO, Se Ho LEE, Hyun Joo PARK, Seung Yeob YI, Jae Il PARK, Hong Dae JUNG
  • Patent number: 11404132
    Abstract: A method for measuring interference in a memory device is provided. The method includes: programming a selected memory cell among a plurality of memory cells connected in series between a bit line and a source line; measuring a first noise value of the programmed selected memory cell; programming an adjacent memory cell adjacent to the selected memory cell among the plurality of memory cells; measuring a second noise value of the selected memory cell, after the programming of the adjacent memory cell is completed; and determining interference on the selected memory cell based on the first noise value and the second noise value. The first noise value and the second noise value are measured by detecting a low frequency noise of a cell current of the selected memory cell.
    Type: Grant
    Filed: May 3, 2021
    Date of Patent: August 2, 2022
    Assignees: SK hynix Inc., Korea University Research and Business Foundation, Seiong Campus
    Inventors: Jae Woo Lee, Soo Hyun Kim, Dong Hyun Kim, Dong Geun Park, Geun Soo Yang, Jung Chun Kim, Sae Yan Choi
  • Publication number: 20210294376
    Abstract: A memory system including a memory controller with channel interfaces connecting memory groups via channels. Each channel interface communicates control, address and/or data (CAD) signals to a channel-connected memory group synchronously with a slave clock derived from an input clock. The various slave clocks being uniquely generated by application of channel interface specific phase/frequency modulation or temporal delay, such that the respective CAD signals are characterized by skewed transition timing.
    Type: Application
    Filed: June 3, 2021
    Publication date: September 23, 2021
    Inventors: YOUNG-JIN CHO, Jae-Geun Park, Young-Kwang Yoo, Soon-Suk Hwang
  • Patent number: 11054855
    Abstract: A memory system including a memory controller with channel interfaces connecting memory groups via channels. Each channel interface communicates control, address and/or data (CAD) signals to a channel-connected memory group synchronously with a slave clock derived from an input clock. The various slave clocks being uniquely generated by application of channel interface specific phase/frequency modulation or temporal delay, such that the respective CAD signals are characterized by skewed transition timing.
    Type: Grant
    Filed: October 2, 2018
    Date of Patent: July 6, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-Jin Cho, Jae-Geun Park, Young-Kwang Yoo, Soon-Suk Hwang
  • Publication number: 20210042057
    Abstract: A storage device set includes a storage device configured to communicate with a host, the storage device including a controller configured to generate encrypted input data by encrypting data; and a reconfigurable logic chip configured to receive the encrypted input data from the storage device, generate processed data by processing the encrypted input data according to a configuration, and generate encrypted output data by encrypting the processed data.
    Type: Application
    Filed: October 23, 2020
    Publication date: February 11, 2021
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jae-geun PARK, Phil-yong JUNG, Ho-jun SHIM, Sang-young YE
  • Patent number: 10817214
    Abstract: Provided is a storage device set. The storage device set includes a storage device configured to communicate with a host, the storage device including a controller configured to generate encrypted input data by encrypting data; and a reconfigurable logic chip configured to receive the encrypted input data from the storage device, generate processed data by processing the encrypted input data according to a configuration, and generate encrypted output data by encrypting the processed data.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: October 27, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-geun Park, Phil-yong Jung, Ho-jun Shim, Sang-young Ye
  • Patent number: 10713197
    Abstract: A method of interfacing a memory controller and a memory device in a memory system includes transmitting a control signal between the memory controller and the memory device using a time division multiplexing (TDM) communication process, and transmitting data between the memory controller and the memory device using a serializer/deserializer (SERDES) communication process. Data communication in the memory system is performed via a physical channel and a plurality of virtual channels corresponding to the physical channel.
    Type: Grant
    Filed: April 17, 2015
    Date of Patent: July 14, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae-Geun Park, Young-Jin Cho
  • Publication number: 20190377513
    Abstract: Provided is a storage device set. The storage device set includes a storage device configured to communicate with a host, the storage device including a controller configured to generate encrypted input data by encrypting data; and a reconfigurable logic chip configured to receive the encrypted input data from the storage device, generate processed data by processing the encrypted input data according to a configuration, and generate encrypted output data by encrypting the processed data.
    Type: Application
    Filed: January 31, 2019
    Publication date: December 12, 2019
    Applicant: Samsung Electronics Co.,Ltd.
    Inventors: Jae-geun Park, Phil-yong Jung, Ho-jun Shim, Sang-young Ye
  • Patent number: 10445014
    Abstract: A method of operating a memory controller is provided. The method of operating a memory controller according to an exemplary embodiment of the present inventive concepts includes sequentially receiving, by the memory controller, first data segments each having a first size from a host, sequentially storing, by the memory controller, the first data segments in the buffer until a sum of sizes of changed data among data stored in a buffer included in the memory controller is a second size, and programming, by the memory controller, the changed data having the second size in a memory space of a non-volatile memory as a second data segment.
    Type: Grant
    Filed: August 14, 2017
    Date of Patent: October 15, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hee Hyun Nam, Young Sik Kim, Jin Woo Kim, Young Jo Park, Jae Geun Park, Young Jin Cho
  • Publication number: 20190033909
    Abstract: A memory system including a memory controller with channel interfaces connecting memory groups via channels. Each channel interface communicates control, address and/or data (CAD) signals to a channel-connected memory group synchronously with a slave clock derived from an input clock. The various slave clocks being uniquely generated by application of channel interface specific phase/frequency modulation or temporal delay, such that the respective CAD signals are characterized by skewed transition timing.
    Type: Application
    Filed: October 2, 2018
    Publication date: January 31, 2019
    Inventors: YOUNG-JIN CHO, Jae-Geun Park, Young-Kwang Yoo, Soon-Suk Hwang
  • Patent number: 10133298
    Abstract: A memory system including a memory controller with channel interfaces connecting memory groups via channels. Each channel interface communicates control, address and/or data (CAD) signals to a channel-connected memory group synchronously with a slave clock derived from an input clock. The various slave clocks being uniquely generated by application of channel interface specific phase/frequency modulation or temporal delay, such that the respective CAD signals are characterized by skewed transition timing.
    Type: Grant
    Filed: January 14, 2016
    Date of Patent: November 20, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-Jin Cho, Jae-Geun Park, Young-Kwang Yoo, Soon-Suk Hwang
  • Patent number: RE49338
    Abstract: The present invention relates to phthalazinone derivatives, including pharmaceutical compositions and for the preparation of phthalazinone derivatives. And more particularly the present invention provided a pharmaceutical composition of phthalazinone derivatives for inhibiting activity of the Poly(ADP-riboside) polymerase enzyme.
    Type: Grant
    Filed: June 20, 2019
    Date of Patent: December 20, 2022
    Assignee: IDIENCE CO., LTD.
    Inventors: Jae-Hoon Kang, Hong-Sub Lee, Yoon-Suk Lee, Joon-Tae Park, Kyung-Mi An, Jin-Ah Jeong, Kyung-Sun Kim, Jeong-Geun Kim, Chang-Hee Hong, Sun-Young Park, Dong-Keun Song, Yong-Don Yun