Patents by Inventor Jae-Geun Yun
Jae-Geun Yun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230269157Abstract: A semiconductor device and an operating method thereof are provided. An operating method of a semiconductor device, includes monitoring a plurality of request packets and a plurality of response packets that are being transmitted between a master device and a slave device; detecting a target request packet that matches desired identification (ID) information from among the plurality of request packets; counting the number of events of a transaction including the target request packet by using an event counter; counting the number of request packets whose corresponding response packets are yet to be detected, from among the plurality of request packets by using a Multiple Outstanding (MO) counter; determining whether an MO count value of the MO counter is valid; and if the MO count value is invalid, resetting the event counter.Type: ApplicationFiled: May 2, 2023Publication date: August 24, 2023Applicant: Samsung Electronics Co., Ltd.Inventors: Jae Geun YUN, Seong Min JO, Yun Kyo CHO, Byeong Jin KIM, Dong Soo KANG, Nak Hee SEONG
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Patent number: 11652718Abstract: A semiconductor device and an operating method thereof are provided. An operating method of a semiconductor device, includes monitoring a plurality of request packets and a plurality of response packets that are being transmitted between a master device and a slave device; detecting a target request packet that matches desired identification (ID) information from among the plurality of request packets; counting the number of events of a transaction including the target request packet by using an event counter; counting the number of request packets whose corresponding response packets are yet to be detected, from among the plurality of request packets by using a Multiple Outstanding (MO) counter; determining whether an MO count value of the MO counter is valid; and if the MO count value is invalid, resetting the event counter.Type: GrantFiled: May 13, 2022Date of Patent: May 16, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jae Geun Yun, Seong Min Jo, Yun Kyo Cho, Byeong Jin Kim, Dong Soo Kang, Nak Hee Seong
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Publication number: 20220272013Abstract: A semiconductor device and an operating method thereof are provided. An operating method of a semiconductor device, includes monitoring a plurality of request packets and a plurality of response packets that are being transmitted between a master device and a slave device; detecting a target request packet that matches desired identification (ID) information from among the plurality of request packets; counting the number of events of a transaction including the target request packet by using an event counter; counting the number of request packets whose corresponding response packets are yet to be detected, from among the plurality of request packets by using a Multiple Outstanding (MO) counter; determining whether an MO count value of the MO counter is valid; and if the MO count value is invalid, resetting the event counter.Type: ApplicationFiled: May 13, 2022Publication date: August 25, 2022Applicant: Samsung Electronics Co., Ltd.Inventors: Jae Geun YUN, Seong Min JO, Yun Kyo CHO, Byeong Jin KIM, Dong Soo KANG, Nak Hee SEONG
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Patent number: 11349738Abstract: A semiconductor device and an operating method thereof are provided. An operating method of a semiconductor device, includes monitoring a plurality of request packets and a plurality of response packets that are being transmitted between a master device and a slave device; detecting a target request packet that matches desired identification (ID) information from among the plurality of request packets; counting the number of events of a transaction including the target request packet by using an event counter; counting the number of request packets whose corresponding response packets are yet to be detected, from among the plurality of request packets by using a Multiple Outstanding (MO) counter; determining whether an MO count value of the MO counter is valid; and if the MO count value is invalid, resetting the event counter.Type: GrantFiled: May 28, 2020Date of Patent: May 31, 2022Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jae Geun Yun, Seong Min Jo, Yun Kyo Cho, Byeong Jin Kim, Dong Soo Kang, Nak Hee Seong
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Publication number: 20200296020Abstract: A semiconductor device and an operating method thereof are provided. An operating method of a semiconductor device, includes monitoring a plurality of request packets and a plurality of response packets that are being transmitted between a master device and a slave device; detecting a target request packet that matches desired identification (ID) information from among the plurality of request packets; counting the number of events of a transaction including the target request packet by using an event counter; counting the number of request packets whose corresponding response packets are yet to be detected, from among the plurality of request packets by using a Multiple Outstanding (MO) counter; determining whether an MO count value of the MO counter is valid; and if the MO count value is invalid, resetting the event counter.Type: ApplicationFiled: May 28, 2020Publication date: September 17, 2020Applicant: Samsung Electronics Co., Ltd.Inventors: Jae Geun YUN, Seong Min JO, Yun Kyo CHO, Byeong Jin KIM, Dong Soo KANG, Nak Hee SEONG
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Patent number: 10680923Abstract: A semiconductor device and an operating method thereof are provided. An operating method of a semiconductor device, includes monitoring a plurality of request packets and a plurality of response packets that are being transmitted between a master device and a slave device; detecting a target request packet that matches desired identification (ID) information from among the plurality of request packets; counting the number of events of a transaction including the target request packet by using an event counter; counting the number of request packets whose corresponding response packets are yet to be detected, from among the plurality of request packets by using a Multiple Outstanding (MO) counter, determining whether an MO count value of the MO counter is valid; and if the MO count value is invalid, resetting the event counter.Type: GrantFiled: February 8, 2017Date of Patent: June 9, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Jae Geun Yun, Seong Min Jo, Yun Kyo Cho, Byeong Jin Kim, Dong Soo Kang, Nak Hee Seong
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Patent number: 10579564Abstract: A system on chip (SoC) is present that includes a plurality of master interfaces, a plurality of slave interfaces, and an interface circuit which is connected between the plurality of master interfaces and the plurality of slave interfaces and includes a plurality of components. When a first master interface among the plurality of master interfaces and a first slave interface among the plurality of slave interfaces are paired, a first group of the components which forms a first signal path between the first master interface and the first slave interface among the plurality of components is enabled according to a control of the first master interface.Type: GrantFiled: February 12, 2019Date of Patent: March 3, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jun Hee Yoo, Jae Geun Yun, Bub Chul Jeong, Dong Soo Kang, Kyeo Rae Lee, Seong Min Jo
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Patent number: 10564855Abstract: An operating method of a semiconductor device includes monitoring multiple request packets and multiple response packets that are being transmitted between a master device and a slave device. A target request packet that matches predefined identification (ID) information is detected from among the request packets. An operation of a latency counter is initiated. The operation is for measuring the latency of a communication exchange (transaction) that includes the target request packet and a target response packet that is one of the response packets that matches the predefined ID information. The target response packet is detected from among the response packets. The operation of the latency counter is terminated. A latency value of the communication exchange is acquired from the latency counter.Type: GrantFiled: July 3, 2019Date of Patent: February 18, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Nak Hee Seong, Sang Youn Lee, Seong Min Jo, Yun Kyo Cho, Dong Soo Kang, Byeong Jin Kim, Jae Geun Yun
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Publication number: 20190324660Abstract: An operating method of a semiconductor device includes monitoring multiple request packets and multiple response packets that are being transmitted between a master device and a slave device. A target request packet that matches predefined identification (ID) information is detected from among the request packets. An operation of a latency counter is initiated. The operation is for measuring the latency of a communication exchange (transaction) that includes the target request packet and a target response packet that is one of the response packets that matches the predefined ID information. The target response packet is detected from among the response packets. The operation of the latency counter is terminated. A latency value of the communication exchange is acquired from the latency counter.Type: ApplicationFiled: July 3, 2019Publication date: October 24, 2019Inventors: NAK HEE SEONG, SANG YOUN LEE, SEONG MIN JO, YUN KYO CHO, DONG SOO KANG, BYEONG JIN KIM, JAE GEUN YUN
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Patent number: 10379749Abstract: An operating method of a semiconductor device includes monitoring multiple request packets and multiple response packets that are being transmitted between a master device and a slave device. A target request packet that matches predefined identification (ID) information is detected from among the request packets. An operation of a latency counter is initiated. The operation is for measuring the latency of a communication exchange (transaction) that includes the target request packet and a target response packet that is one of the response packets that matches the predefined ID information. The target response packet is detected from among the response packets. The operation of the latency counter is terminated. A latency value of the communication exchange is acquired from the latency counter.Type: GrantFiled: February 3, 2017Date of Patent: August 13, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Nak Hee Seong, Sang Youn Lee, Seong Min Jo, Yun Kyo Cho, Dong Soo Kang, Byeong Jin Kim, Jae Geun Yun
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Publication number: 20190171597Abstract: A system on chip (SoC) is present that includes a plurality of master interfaces, a plurality of slave interfaces, and an interface circuit which is connected between the plurality of master interfaces and the plurality of slave interfaces and includes a plurality of components. When a first master interface among the plurality of master interfaces and a first slave interface among the plurality of slave interfaces are paired, a first group of the components which forms a first signal path between the first master interface and the first slave interface among the plurality of components is enabled according to a control of the first master interface.Type: ApplicationFiled: February 12, 2019Publication date: June 6, 2019Inventors: JUN HEE YOO, JAE GEUN YUN, BUB CHUL JEONG, DONG SOO KANG, KYEO RAE LEE, SEONG MIN JO
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Patent number: 10229079Abstract: A system on chip (SoC) is present that includes a plurality of master interfaces, a plurality of slave interfaces, and an interface circuit which is connected between the plurality of master interfaces and the plurality of slave interfaces and includes a plurality of components. When a first master interface among the plurality of master interfaces and a first slave interface among the plurality of slave interfaces are paired, a first group of the components which forms a first signal path between the first master interface and the first slave interface among the plurality of components is enabled according to a control of the first master interface.Type: GrantFiled: May 25, 2018Date of Patent: March 12, 2019Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jun Hee Yoo, Jae Geun Yun, Bub Chul Jeong, Dong Soo Kang, Kyeo Rae Lee, Seong Min Jo
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Publication number: 20180276160Abstract: A system on chip (SoC) is present that includes a plurality of master interfaces, a plurality of slave interfaces, and an interface circuit which is connected between the plurality of master interfaces and the plurality of slave interfaces and includes a plurality of components. When a first master interface among the plurality of master interfaces and a first slave interface among the plurality of slave interfaces are paired, a first group of the components which forms a first signal path between the first master interface and the first slave interface among the plurality of components is enabled according to a control of the first master interface.Type: ApplicationFiled: May 25, 2018Publication date: September 27, 2018Inventors: JUN HEE YOO, Jae Geun Yun, Bub Chul Jeong, Dong Soo Kang, Kyeo Rae Lee, Seong Min Jo
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Patent number: 9984019Abstract: A system on chip (SoC) is present that includes a plurality of master interfaces, a plurality of slave interfaces, and an interface circuit which is connected between the plurality of master interfaces and the plurality of slave interfaces and includes a plurality of components. When a first master interface among the plurality of master interfaces and a first slave interface among the plurality of slave interfaces are paired, a first group of the components which forms a first signal path between the first master interface and the first slave interface among the plurality of components is enabled according to a control of the first master interface.Type: GrantFiled: December 8, 2015Date of Patent: May 29, 2018Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jun Hee Yoo, Jae Geun Yun, Bub Chul Jeong, Dong Soo Kang, Kyeo Rae Lee, Seong Min Jo
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Publication number: 20170237636Abstract: A semiconductor device and an operating method thereof are provided. An operating method of a semiconductor device, includes monitoring a plurality of request packets and a plurality of response packets that are being transmitted between a master device and a slave device; detecting a target request packet that matches desired identification (ID) information from among the plurality of request packets; counting the number of events of a transaction including the target request packet by using an event counter; counting the number of request packets whose corresponding response packets are yet to be detected, from among the plurality of request packets by using a Multiple Outstanding (MO) counter, determining whether an MO count value of the MO counter is valid; and if the MO count value is invalid, resetting the event counter.Type: ApplicationFiled: February 8, 2017Publication date: August 17, 2017Applicant: Samsung Electronics Co., Ltd.Inventors: Jae Geun YUN, Seong Min JO, Yun Kyo CHO, Byeong Jin KIM, Dong Soo KANG, Nak Hee SEONG
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Publication number: 20170228169Abstract: An operating method of a semiconductor device includes monitoring multiple request packets and multiple response packets that are being transmitted between a master device and a slave device. A target request packet that matches predefined identification (ID) information is detected from among the request packets. An operation of a latency counter is initiated. The operation is for measuring the latency of a communication exchange (transaction) that includes the target request packet and a target response packet that is one of the response packets that matches the predefined ID information. The target response packet is detected from among the response packets. The operation of the latency counter is terminated. A latency value of the communication exchange is acquired from the latency counter.Type: ApplicationFiled: February 3, 2017Publication date: August 10, 2017Inventors: NAK HEE SEONG, SANG YOUN LEE, SEONG MIN JO, YUN KYO CHO, DONG SOO KANG, BYEONG JIN KIM, JAE GEUN YUN
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Patent number: 9690730Abstract: A register slicing circuit includes first and second register circuits, a forward channel and a backward channel. The first and second register circuits sequentially store requests received from a plurality of master devices to output the stored requests toward a slave device. The forward channel is used for sending a first request from the first register circuit to the second register circuit, and the backward channel is used for sending back a second request from the second register circuit to the first register circuit.Type: GrantFiled: November 12, 2013Date of Patent: June 27, 2017Assignee: Samsung Electronics Co., Ltd.Inventors: Jae-Geun Yun, Sung-Hoon Shim, Bub-Chul Cheong
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Publication number: 20160196227Abstract: A system on chip (SoC) is present that includes a plurality of master interfaces, a plurality of slave interfaces, and an interface circuit which is connected between the plurality of master interfaces and the plurality of slave interfaces and includes a plurality of components. When a first master interface among the plurality of master interfaces and a first slave interface among the plurality of slave interfaces are paired, a first group of the components which forms a first signal path between the first master interface and the first slave interface among the plurality of components is enabled according to a control of the first master interface.Type: ApplicationFiled: December 8, 2015Publication date: July 7, 2016Inventors: JUN HEE YOO, JAE GEUN YUN, BUB CHUL JEONG, DONG SOO KANG, KYEO RAE LEE, SEONG MIN JO
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Patent number: 9367499Abstract: A system on chip (SOC) include at least one slave device, a plurality of master devices, a plurality of service controllers and an interconnect device. The master devices generate requests to demand services from the slave device, respectively. The service controllers generate urgent information signals and priority information signals for each of the master devices. The interconnect device is coupled to the slave device and the master devices through respective channels. The interconnect device performs an arbitrating operation on the requests based on the priority information signals and controls request flows between the slave device and the master devices based on the urgent information signals.Type: GrantFiled: March 8, 2013Date of Patent: June 14, 2016Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jae-Geun Yun, Bub-Chul Jeong, Lingling Liao
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Patent number: 9356873Abstract: A backbone channel transmits first through third channel packets among Advanced eXtensible Interface (AXI) 5 channel packets. The backbone channel is managed by dividing the backbone channel into a first sub-channel and a second sub-channel, transmitting the first channel packet through the first sub-channel, transmitting the second channel packet through the second sub-channel, and transmitting the third channel packet through both the first sub-channel and the second sub-channel.Type: GrantFiled: October 15, 2013Date of Patent: May 31, 2016Assignee: Samsung Electronics Co., Ltd.Inventors: Jae-Geun Yun, Bub-Chul Jeong