Patents by Inventor Jae-Gon Seo

Jae-Gon Seo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11949881
    Abstract: The present invention discloses an encoding apparatus using a Discrete Cosine Transform (DCT) scanning, which includes a mode selection means for selecting an optimal mode for intra prediction; an intra prediction means for performing intra prediction onto video inputted based on the mode selected in the mode selection means; a DCT and quantization means for performing DCT and quantization onto residual coefficients of a block outputted from the intra prediction means; and an entropy encoding means for performing entropy encoding onto DCT coefficients acquired from the DCT and quantization by using a scanning mode decided based on pixel similarity of the residual coefficients.
    Type: Grant
    Filed: April 1, 2021
    Date of Patent: April 2, 2024
    Assignees: Electronics and Telecommunications Research Institute, Kwangwoon University Research Institute for Industry Cooperation, Industry-Academia Cooperation Group of Sejong University
    Inventors: Se-Yoon Jeong, Hae-Chul Choi, Jeong-Il Seo, Seung-Kwon Beack, In-Seon Jang, Jae-Gon Kim, Kyung-Ae Moon, Dae-Young Jang, Jin-Woo Hong, Jin-Woong Kim, Yung-Lyul Lee, Dong-Gyu Sim, Seoung-Jun Oh, Chang-Beom Ahn, Dae-Yeon Kim, Dong-Kyun Kim
  • Patent number: 7898228
    Abstract: A synchronous switch uses body-control switches to control the polarity of the parasitic device, which can be used to reduce power consumption by the parasitic device in accordance with various operating conditions. A charge-supplying device (such as a capacitor) is coupled in series between the bulk node (of the synchronous switch) and a power node (such as Vout or ground). The charge-supplying device provides power to the bulk node of the switch during reverse recovery of the parasitic device to minimize recombination time. Minimizing recombination time allows the polarity of the parasitic device to be switched more quickly (especially under low operating voltage and/or heavy load conditions), which converses more power.
    Type: Grant
    Filed: May 25, 2007
    Date of Patent: March 1, 2011
    Assignee: National Semiconductor Corporation
    Inventors: Hyun-Ick Shin, Jae-Gon Seo, Sang-Yong Lee
  • Patent number: 7158390
    Abstract: A converter is presented, including first and second switches coupled to an input power source to define a first conductive path, and third and fourth switches coupled to the input power source to define a second conductive path. A PWM unit turns on the switches in the order of the fourth, first, third, second, first, fourth, second, and third switches, and outputs pulse signals so that the first and fourth switches are turned on in overlapping intervals and the second and third switches are turned on in overlapping intervals.
    Type: Grant
    Filed: July 29, 2004
    Date of Patent: January 2, 2007
    Assignee: Fairchild Korea Semiconductor, Ltd.
    Inventors: Jae-Soon Choi, Dong-Hee Kim, Jae-Gon Seo, Hong-Gyu Han
  • Publication number: 20050128772
    Abstract: A converter is presented, including first and second switches coupled to an input power source to define a first conductive path, and third and fourth switches coupled to the input power source to define a second conductive path. A PWM unit turns on the switches in the order of the fourth, first, third, second, first, fourth, second, and third switches, and outputs pulse signals so that the first and fourth switches are turned on in overlapping intervals and the second and third switches are turned on in overlapping intervals.
    Type: Application
    Filed: July 29, 2004
    Publication date: June 16, 2005
    Inventors: Jae-Soon Choi, Dong-Hee Kim, Jae-Gon Seo, Hong-Gyu Han