Abstract: An embodiment radiative cooling glazing unit includes a first transparent base layer, a first light reflecting layer on the first transparent base layer and having a reflectance of 80% or greater for light with a wavelength of 780 to 1,300 nm and a transmittance of 70% or greater for visible light with a wavelength of 400 to 780 nm, a second light reflecting layer on the first light reflecting layer and including a stack of a first metal protective layer, a metal layer, and a second metal protective layer sequentially stacked on the first light reflecting layer, and a second transparent base layer on the second light reflecting layer.

Abstract: The present invention is related to a method for fabricating a semiconductor device capable of forming fine patterns. The method for fabricating the semiconductor device according to the present invention may comprise forming an etch mask layer on an etch target layer; forming a spacer structure in which first spacers and second spacers are alternately disposed and spaced apart from each other on the etch mask layer; forming first spacer lines through selective etching of the first spacers; forming second spacer lines through selective etching of the second spacers; and etching the etch target layer to form a plurality of fine line patterns using the first and second spacer lines.

Abstract: The present invention is related to a method for fabricating a semiconductor device capable of forming fine patterns. The method for fabricating the semiconductor device according to the present invention may comprise forming an etch mask layer on an etch target layer; forming a spacer structure in which first spacers and second spacers are alternately disposed and spaced apart from each other on the etch mask layer; forming first spacer lines through selective etching of the first spacers; forming second spacer lines through selective etching of the second spacers; and etching the etch target layer to form a plurality of fine line patterns using the first and second spacer lines.

Abstract: An exemplary embodiment of the present disclosure provides a physically unclonable function (PUF) cell capable of exhibiting a stable performance and showing an excellent repeatability while being less affected by environmental factors such as a noise, temperature, and bias voltage. The PUF cell generates an output value by combining a scheme of amplifying a threshold voltage difference and a scheme of amplifying an oscillation frequency difference. In an oscillator that generates oscillation signals of different frequencies, the frequency difference of the oscillation signals is amplified by alternately supplying bias voltages of different magnitudes generated by utilizing the threshold voltage difference to a plurality of stages in the oscillator.

Abstract: A memory system includes a memory controller, a first memory module including first and second groups of first memory chips, a second memory module including first and second groups of second memory chips, and a channel including a first group of signal lines suitable for coupling the memory controller with the first memory module, and a second group of signal lines suitable for coupling the memory controller with the second memory module.

Abstract: A printed circuit board includes: a core portion including a cavity in one surface thereof; first and second penetration holes disposed in a bottom surface of the cavity and penetrating through the core portion; an electronic component disposed in the cavity; and an insulating material filling the cavity and each of the first and second penetration holes, wherein a sidewall of the cavity is higher than the electronic component.

Abstract: A memory system includes a memory controller, a first memory module including first and second groups of first memory chips, a second memory module including first and second groups of second memory chips, and a channel including a first group of signal lines suitable for coupling the memory controller with the first memory module, and a second group of signal lines suitable for coupling the memory controller with the second memory module.

Abstract: A printed circuit board includes an insulating layer; a recess portion disposed on one surface of the insulating layer; and a circuit layer disposed on the one surface of the insulating layer and including a signal pattern and a ground pattern. At least a portion of the ground pattern covers at least a portion of the recess portion.

Abstract: The present invention is related to a method for fabricating a semiconductor device capable of forming fine patterns. The method for fabricating the semiconductor device according to the present invention may comprise forming an etch mask layer on an etch target layer; forming a spacer structure in which first spacers and second spacers are alternately disposed and spaced apart from each other on the etch mask layer; forming first spacer lines through selective etching of the first spacers; forming second spacer lines through selective etching of the second spacers; and etching the etch target layer to form a plurality of fine line patterns using the first and second spacer lines.

Abstract: The present invention is related to a method for fabricating a semiconductor device capable of forming fine patterns. The method for fabricating the semiconductor device according to the present invention may comprise forming an etch mask layer on an etch target layer; forming a spacer structure in which first spacers and second spacers are alternately disposed and spaced apart from each other on the etch mask layer; forming first spacer lines through selective etching of the first spacers; forming second spacer lines through selective etching of the second spacers; and etching the etch target layer to form a plurality of fine line patterns using the first and second spacer lines.

Abstract: A printed circuit board includes: a core portion including a cavity in one surface thereof; first and second penetration holes disposed in a bottom surface of the cavity and penetrating through the core portion; an electronic component disposed in the cavity; and an insulating material filling the cavity and each of the first and second penetration holes, wherein a sidewall of the cavity is higher than the electronic component.

Abstract: A printed circuit board includes an insulating layer; a recess portion disposed on one surface of the insulating layer; and a circuit layer disposed on the one surface of the insulating layer and including a signal pattern and a ground pattern. At least a portion of the ground pattern covers at least a portion of the recess portion.

Abstract: An exemplary embodiment of the present disclosure provides a physically unclonable function (PUF) cell capable of exhibiting a stable performance and showing an excellent repeatability while being less affected by environmental factors such as a noise, temperature, and bias voltage. The PUF cell generates an output value by combining a scheme of amplifying a threshold voltage difference and a scheme of amplifying an oscillation frequency difference. In an oscillator that generates oscillation signals of different frequencies, the frequency difference of the oscillation signals is amplified by alternately supplying bias voltages of different magnitudes generated by utilizing the threshold voltage difference to a plurality of stages in the oscillator.

Abstract: Disclosed are a composite resin composition and an article containing the same. The composite resin composition may include semicrystalline polyamide; amorphous polyamide; an acrylonitrile-butadiene-styrene (ABS) resin; a compatibilizer; and a strength-reinforcing agent. The article may exhibit superior rigidity equivalent to or greater than that of conventional long-fiber thermoplastics and remarkably excellent dimensional stability. In addition, the composite resin composition and the molded article including the same may be used in replacement of steel parts so as to reduce the weight by about 30%.

Abstract: A memory system includes a memory controller, a first memory module including first and second groups of first memory chips, a second memory module including first and second groups of second memory chips, and a channel including a first group of signal lines suitable for coupling the memory controller with the first memory module, and a second group of signal lines suitable for coupling the memory controller with the second memory module.

Abstract: A memory system includes a memory controller, a first memory module including first and second groups of first memory chips, a second memory module including first and second groups of second memory chips, and a channel including a first group of signal lines suitable for coupling the memory controller with the first memory module, and a second group of signal lines suitable for coupling the memory controller with the second memory module.

Abstract: The present invention is related to a method for fabricating a semiconductor device capable of forming fine patterns. The method for fabricating the semiconductor device according to the present invention may comprise forming an etch mask layer on an etch target layer; forming a spacer structure in which first spacers and second spacers are alternately disposed and spaced apart from each other on the etch mask layer; forming first spacer lines through selective etching of the first spacers; forming second spacer lines through selective etching of the second spacers; and etching the etch target layer to form a plurality of fine line patterns using the first and second spacer lines.

Abstract: A data storage device includes a storage, a buffer memory, and a controller. The controller is configured to control at least one of an input of data to and an output of data from the storage in response to a request transmitted from a host device. The controller is also configured to receive write data transmitted from the host device and cached in the buffer memory, encrypt the write data, and store the encrypted write data in the storage. The controller is further configured to receive read data read from the storage and cached in the buffer memory, decrypt the read data, and provide the decrypted read data to the host device.

Abstract: A memory system includes a memory controller, a first memory module including first and second groups of first memory chips, a second memory module including first and second groups of second memory chips, and a channel including a first group of signal lines suitable for coupling the memory controller with the first memory module, and a second group of signal lines suitable for coupling the memory controller with the second memory module.

Abstract: A memory system includes a memory controller, a first memory module including first and second groups of first memory chips, a second memory module including first and second groups of second memory chips, and a channel including a first group of signal lines suitable for coupling the memory controller with the first memory module, and a second group of signal lines suitable for coupling the memory controller with the second memory module.