Abstract: A light emitting element includes: a light emitting stack pattern including a first semiconductor layer, an active layer, and a second semiconductor layer that are sequentially stacked along one direction; and an insulating film surrounding an outer surface of at least one of the first semiconductor layer, the active layer, and the second semiconductor layer. The insulating film including a zinc oxide (ZnO) thin film layer.

Abstract: A method of manufacturing a composite anode for a lithium ion battery and a composite anode for a lithium ion battery manufactured thereby. According to the method provide herein, since a metal catalyst precursor is reduced using Joule heating to obtain a carbon-metal catalyst composite layer, composite anode for a lithium ion battery having a large area in a short period of time can be provided, which is excellent in terms of economic feasibility. Further, since it is possible to manufacture a composite anode for a lithium ion battery with the improved lithium electrodeposition density and reversibility of lithium ions, a composite anode for a lithium ion battery having high capacity and improved life stability can be obtained.

Abstract: The present invention relates to a novel heterocyclic compound and a composition, for preventing or treating a cancer, an autoimmune disease, and an inflammatory disease, comprising same. The novel heterocyclic compound of the present invention is a bifunctional compound having a Bruton's tyrosine kinase (BTK) degradation function via a ubiquitin proteasome pathway, and may be utilized as a composition for preventing or treating a cancer, an autoimmune disease, and Parkinson's disease.

Abstract: The present invention relates to a novel heterocyclic compound and a composition, for preventing or treating a cancer, an autoimmune disease, and an inflammatory disease, comprising same. The novel heterocyclic compound of the present invention is a bifunctional compound having a Bruton's tyrosine kinase (BTK) degradation function via a ubiquitin proteasome pathway, and may be utilized as a composition for preventing or treating a cancer, an autoimmune disease, and Parkinson's disease.

Abstract: A light emitting element ink comprises a light emitting element solvent, a light emitting element dispersed in the light emitting element solvent, the light emitting element including a plurality of semiconductor layers, and an insulating film surrounding outer surfaces of the plurality of semiconductor layers, and a thickener dispersed in the light emitting element solvent, wherein the thickener includes a compound represented by Chemical Structural Formula 1 as a polyol-based compound capable of forming a hydrogen bond with the light emitting element solvent or another thickener, and the thickener has a boiling point in a range of about 200° C. to about 450° C.

Abstract: The present invention relates to an image encoding/decoding method and device, and the image encoding method or device according to an embodiment of the present invention may encode a position of a reference coefficient within a current transform block to be encoded, and encoding skip region information of a skip region selected on the basis of the position of the reference coefficient. The skip region information may represent whether or not coefficients within the skip region have an identical coefficient value.

Abstract: The present invention relates to a method for selectively separating propylene carbonate by adding water to reaction products comprising a polyether carbonate polyol and propylene carbonate, which are generated from a polymerization reaction of propylene oxide and carbon dioxide under a double metal cyanide (DMC) catalyst, wherein an economical and effective separation of propylene carbonate can be achieved.

Abstract: The present invention relates to a double metal cyanide catalyst comprising a polyether compound, a metal salt, a metal cyanide salt, and an organic complexing agent having an acetate group or a tartrate group; a preparation method therefor; and a method for preparing a polycarbonate polyether polyol by copolymerizing carbon dioxide and an epoxy compound in the presence of the catalyst. According to the present invention, the double metal cyanide catalyst has excellent in catalytic activity and has a short catalytic activity induction time, according to an embodiment of the present invention, the process for preparing the catalyst of the present invention is eco-friendly and simple in process, since an amount of the organic complexing agent to be used is small, and has a simple process.

Abstract: The present invention relates to a method for selectively separating propylene carbonate by adding water to reaction products comprising a polyether carbonate polyol and propylene carbonate, which are generated from a polymerization reaction of propylene oxide and carbon dioxide under a double metal cyanide (DMC) catalyst, wherein an economical and effective separation of propylene carbonate can be achieved.

Abstract: The present invention relates to a double metal cyanide catalyst comprising a polyether compound, a metal salt, a metal cyanide salt, and an organic complexing agent having an acetate group or a tartrate group; a preparation method therefor; and a method for preparing a polycarbonate polyether polyol by copolymerizing carbon dioxide and an epoxy compound in the presence of the catalyst. According to the present invention, the double metal cyanide catalyst has excellent in catalytic activity and has a short catalytic activity induction time, according to an embodiment of the present invention, the process for preparing the catalyst of the present invention is eco-friendly and simple in process, since an amount of the organic complexing agent to be used is small, and has a simple process.

Abstract: The present invention relates to a diffusion barrier layer for a semiconductor device and fabrication method thereof. The diffusion barrier layer according to the present invention is fabricated by forming a diffusion barrier layer containing a refractory metal material and an insulating material on an insulating layer and in a contact hole, wherein the insulating layer being partially etched to form the contact hole, is formed on a semiconductor substrate; and annealing the diffusion barrier layer. Therefore, an object of the present invention is to provide a diffusion barrier layer for a semiconductor device, which is of an amorphous or microcrystalline state and thermodynamically stable even at a high temperature since an insulating material is bonded to a refractory metal material in the diffusion barrier layer.

Abstract: The present invention relates to a method of forming a conductive layer and an electroplating device, and in particular, to a method of forming a conductive layer that provides an electrically-conductive layer having both characteristics of increased adhesiveness to an electroplated body and increased uniformity. The electroplating apparatus and method can produce supersonic waves for electroplating. Thus, the electroplating device can include a wave generator. The electroplating device can further include a plating bath filled with an electrolyte solution that can propagate super sonic waves, a power supply, a plated body connected electrically to a first terminal of the power supply, and a plating body connected electrically to a second terminal of the power supply where the plating body provides ions the same as dissolved in the electrolyte solution to maintain a desired concentration of dissolved ions.

Abstract: A computer simulation method for a semiconductor device manufacturing process, includes: a first step for forming an initial section of the material with only open cells exposed to the growth or etching among the cells; a second step for inputting information including growth or etching points into each open cell; a third step for computing a movement speed for the growth or etching points; a fourth step for moving the growth or etching points for a time determined according to the movement speed; and a fifth step for forming a new etching section by re-arranging the open cells exposed to the growth or etching, after moving the growth or etching points, the second to fifth steps being repeatedly performed on the re-arranged open cells until the sum of the predetermined time reaches the time (T).

Abstract: The present invention relates to a diffusion barrier layer for a semiconductor device and fabrication method thereof. The diffusion barrier layer according to the present invention is fabricated by forming a diffusion barrier layer containing a refractory metal material and an insulating material on an insulating layer and in a contact hole, wherein the insulating layer being partially etched to form the contact hole, is formed on a semiconductor substrate; and annealing the diffusion barrier layer. Therefore, an object of the present invention is to provide a diffusion barrier layer for a semiconductor device, which is of an amorphous or microcrystalline state and thermodynamically stable even at a high temperature since an insulating material is bonded to a refractory metal material in the diffusion barrier layer.

Abstract: The present invention relates to a diffusion barrier layer for a semiconductor device and fabrication method thereof. The diffusion barrier layer according to the present invention is fabricated by forming a diffusion barrier layer containing a refractory metal material and an insulating material on an insulating layer and in a contact hole, wherein the insulating layer being partially etched to form the contact hole, is formed on a semiconductor substrate; and annealing the diffusion barrier layer. Therefore, an object of the present invention is to provide a diffusion barrier layer for a semiconductor device, which is of an amorphous or microcrystalline state and thermodynamically stable even at a high temperature since an insulating material is bonded to a refractory metal material in the diffusion barrier layer.

Abstract: A method for forming a dual gate of a semiconductor devices by etching the polysilicon layer as a multi-step, resulting in etching velocities and anisotropic etching profiles for doped polysilicon and undoped polysilicon that are consistent and, since there is no difference in etching selectivity in the following etching step, damage of gate oxide layer by excess etching is prevented.

Abstract: A method of forming a patterned photoresist layer is performed in a nitrogen gas atmosphere. The method includes the steps of sequentially forming a layer to be etched and first photoresist layer on a semiconductor substrate, and sequentially forming an intermediate barrier layer and second photoresist layer on the first photoresist layer. The second photoresist layer is patterned, and the intermediate barrier layer is etched using the patterned second photoresist layer as a mask. The first photoresist layer is etched in a nitrogen gas atmosphere, and the first photoresist layer is etched using the patterned intermediate barrier layer as a mask.

Abstract: The present invention relates to a method of forming a conductive layer and an electroplating device, and in particular, to a method of forming a conductive layer that provides an electrically-conductive layer having both characteristics of increased adhesiveness to an electroplated body and increased uniformity. The electroplating apparatus and method can produce supersonic waves for electroplating. Thus, the electroplating device can include a wave generator. The electroplating device can further include a plating bath filled with an electrolyte solution that can propagate super sonic waves, a power supply, a plated body connected electrically to a first terminal of the power supply, and a plating body connected electrically to a second terminal of the power supply where the plating body provides ions the same as dissolved in the electrolyte solution to maintain a desired concentration of dissolved ions.

Abstract: The present invention relates to a method of forming a conductive layer and an electroplating device, and in particular, to a method of forming a conductive layer that provides an electrically-conductive layer having both characteristics of increased adhesiveness to an electroplated body and increased uniformity. The electroplating apparatus and method can produce supersonic waves for electroplating. Thus, the electroplating device can include a wave generator. The electroplating device can further include a plating bath filled with an electrolyte solution that can propagate super sonic waves, a power supply, a plated body connected electrically to a first terminal of the power supply, and a plating body connected electrically to a second terminal of the power supply where the plating body provides ions the same as dissolved in the electrolyte solution to maintain a desired concentration of dissolved ions.

Abstract: A method for manufacturing a semiconductor device is provided in which a polish stop point can be accurately measured for multiple layers formed of the same material. The method involves: depositing a first interlevel dielectric (ILD) film over a semiconductor substrate having steps; forming a planarization layer over the first ILD film; forming an insulation layer containing a metal over the planarization layer; forming a second ILD film over the insulation layer containing the metal; polishing the second ILD film, the insulation layer with the metal, and a portion of the planarization layer by chemical mechanical polishing (CMP), to planarize the semiconductor substrate, wherein a polish stop point is determined by measuring a variation of conductivity of byproducts from the CMP.