Patents by Inventor Jae Heon Park

Jae Heon Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11970616
    Abstract: A modified conjugated diene-based polymer having high linearity and improved compounding properties is provided. The modified conjugated diene-based polymer includes phosphor, sulfur and chlorine in specific amount ranges, and the degree of branching is controlled, and accordingly, if applied to a rubber composition, tensile strength and viscoelasticity may be excellent, and processability may be markedly improved.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: April 30, 2024
    Assignee: LG Chem, Ltd.
    Inventors: Kyoung Hwan Oh, Hyo Jin Bae, Hyun Woong Park, Jeong Heon Ahn, Jae Hyeong Park
  • Publication number: 20240081393
    Abstract: A sidestream smoke removal device and a control method thereof are provided. The sidestream smoke removal device according to some embodiments of the present disclosure may include a housing in which a smoking space is formed, an article insertion portion which is disposed at one end of the housing and forms an opening for insertion of a smoking article into the smoking space, an ignition portion which is configured to ignite the smoking article inserted into the smoking space, a sidestream smoke processing portion which is configured to process sidestream smoke generated from the smoking article inserted into the smoking space, and a heating portion disposed inside the housing to heat the smoking space. The heating portion may heat the smoking space to remove a smell generated due to by-products of smoking, and accordingly, the cleanliness of the sidestream smoke removal device can be improved.
    Type: Application
    Filed: July 11, 2022
    Publication date: March 14, 2024
    Applicant: KT&G CORPORATION
    Inventors: Seung Kyu HAN, Jin Won PARK, Jae Hyun KIM, Tae Heon KIM
  • Publication number: 20240079413
    Abstract: A complementary thin film transistor (TFT) includes a substrate and a first TFT and a second TFT disposed on the substrate, wherein a first conductive semiconductor layer of the first TFT and a second gate electrode layer of the second TFT are disposed in the same layer and include the same material.
    Type: Application
    Filed: August 31, 2023
    Publication date: March 7, 2024
    Inventors: Himchan OH, Jong-Heon YANG, Ji Hun CHOI, Seung Youl KANG, Yong Hae KIM, Jeho NA, Jaehyun MOON, Chan Woo PARK, Sung Haeng CHO, Jae-Eun PI, Chi-Sun HWANG
  • Patent number: 11919999
    Abstract: Provided are a method for preparing a polyetherketoneketone and a polyetherketoneketone prepared thereby, wherein, at the time of a polymerization reaction, nitrogen gas is blown into a liquid reaction medium while stirring, thereby quickly removing hydrochloric acid, which is a by-product generated during the reaction, and preventing aggregation of resin particles, thus suppressing the generation of scales.
    Type: Grant
    Filed: November 16, 2018
    Date of Patent: March 5, 2024
    Assignee: HANWHA CHEMICAL CORPORATION
    Inventors: Kwang Seok Jeong, Min Sung Kim, Jae Heon Kim, Ju Young Park, Cho Hee Ahn, Byeong Hyeon Lee, Sang Hyun Cho
  • Patent number: 7004708
    Abstract: Systems and methods are described for wafer processin. A wafer processing apparatus includes: a first wafer transporter; a process station coupled to the first wafer transporter, the process station including: a first plurality of wafer processing stacks, each of the plurality of wafer processing stacks including a plurality of wafer processing modules, and a second wafer transporter coupled to the plurality of wafer processing modules, each of the plurality of wafer processing modules adjacent, and accessible by, the second wafer transporter; and a third wafer transporter coupled to the process station, wherein any of the plurality of wafer processing modules in any of the plurality of wafer processing stacks can be accessed by at least two adjacent wafer transporters from among the first, second and third wafer transporter.
    Type: Grant
    Filed: July 11, 2003
    Date of Patent: February 28, 2006
    Assignee: ASML Holding N.V.
    Inventor: Jae Heon Park
  • Patent number: 6746826
    Abstract: Methods and apparatus are described for improved yield and line width performance for liquid polymers and other materials. A method for minimizing precipitation of developing reactant by lowering a sudden change in pH includes: developing at least a portion of a polymer layer on a substrate with an initial charge of a developer fluid; then rinsing the polymer with an additional charge of the developer fluid so as to controllably minimize a subsequent sudden change in pH; and then rinsing the polymer with a charge of another fluid. A method for achieving a more uniform, quasi-equilibrium succession of states from the introduction of developer chemical to the wafer surface to its removal is also described. The method reduces process-induced defects and improves critical dimension (CD) control.
    Type: Grant
    Filed: July 25, 2000
    Date of Patent: June 8, 2004
    Assignee: ASML Holding N.V.
    Inventors: Jae Heon Park, Jung Suk Bang
  • Publication number: 20040107014
    Abstract: Systems and methods are described for wafer processing. A wafer processing apparatus includes: a first wafer transporter; a process station coupled to the first wafer transporter, the process station including: a first plurality of wafer processing stacks, each of the plurality of wafer processing stacks including a plurality of wafer processing modules, and a second wafer transporter coupled to the plurality of wafer processing modules, each of the plurality of wafer processing modules adjacent, and accessible by, the second wafer transporter; and a third wafer transporter coupled to the process station, wherein any of the plurality of wafer processing modules in any of the plurality of wafer processing stacks can be accessed by at least two adjacent wafer transporters from among the first, second and third wafer transporter.
    Type: Application
    Filed: July 11, 2003
    Publication date: June 3, 2004
    Inventor: Jae Heon Park
  • Patent number: 6616394
    Abstract: Systems and methods are described for wafer processing. A wafer processing apparatus includes: a first wafer transporter; a process station coupled to the first wafer transporter, the process station including: a first plurality of wafer processing stacks, each of the plurality of wafer processing stacks including a plurality of wafer processing modules, and a second wafer transporter coupled to the plurality of wafer processing modules, each of the plurality of wafer processing modules adjacent, and accessible by, the second wafer transporter; and a third wafer transporter coupled to the process station, wherein any of the plurality of wafer processing modules in any of the plurality of wafer processing stacks can be accessed by at least two adjacent wafer transporters from among the first, second and third wafer transporter.
    Type: Grant
    Filed: December 30, 1998
    Date of Patent: September 9, 2003
    Assignee: Silicon Valley Group
    Inventor: Jae Heon Park