Abstract: Provided herein is an electrostatic capacitive type window integrated touch screen panel and a method for manufacturing a touch screen panel thereof, the method comprising: forming an oxide metal oxide (OMO) hybrid electrode on a strengthened substrate; and etching the OMO hybrid electrode and forming a pattern, and forming a pattern insertion layer on the pattern, wherein the OMO hybrid electrode is formed by depositing a bottom-layer, metal-layer and top-layer on top of the strengthened substrate, and the pattern insertion layer is formed based on an oxide having a refractive index of a certain range.

Abstract: Provided herein is an electrostatic capacitive type window integrated touch screen panel and a method for manufacturing a touch screen panel thereof, the method comprising: forming an oxide metal oxide (OMO) hybrid electrode on a strengthened substrate; and etching the OMO hybrid electrode and forming a pattern, and forming a pattern insertion layer on the pattern, wherein the OMO hybrid electrode is formed by depositing a bottom-layer, metal-layer and top-layer on top of the strengthened substrate, and the pattern insertion layer is formed based on an oxide having a refractive index of a certain range.

Abstract: Provided are a method and apparatus for modeling source-drain current of a TFT. The method includes receiving sample data, the sample data including a sample input value and a sample output value; adjusting modeling variables according to the sample data; calculating a current model value according to the adjusted modeling variables; when a difference between the calculated current model value and the sample output value is smaller than a predetermined threshold value, fitting a current model by applying the adjusted modeling variables to the current model; applying actual input data to the fitted current model; and outputting a result value corresponding to the actual input data, wherein the current model is a model for predicting the source-drain current of the TFT.

Abstract: Due to the indirect transition characteristic of silicon semiconductors, the light extraction efficiency of a silicon-based light emitting diode is lower than that of a compound semiconductor-based light emitting diode. For this reason, there are difficulties in practically using and commercializing silicon-based light emitting diodes developed so far.

Abstract: Provided is a semiconductor laser device including: a gain area where multi-wavelength lights are generated and gain are provided; a first reflection area where among the multi-wavelength lights, a first-wavelength light is reflected to the gain area in response to a first selection signal; a second reflection area where among the multi-wavelength lights, a second-wavelength light is reflected to the gain area; and a phase control area where a phase of the second-wavelength light is shifted in response to a phase control signal, the phase control area being disposed between the first reflection layer and the second reflection layer.

Abstract: Provided are a method of fabricating a zinc-tin-oxide (ZTO) thin film, a thin film transistor employing the same, and a method of fabricating a thin film transistor. The method of fabricating a ZTO thin film includes depositing zinc oxide and tin oxide at a deposition temperature of 450° C. or lower so that a zinc-to-tin atomic ratio is 4:1 or greater, to form an amorphous ZTO thin film. In the thin film transistor, the ZTO thin film is used as a channel layer.

Abstract: Provided are a composition for an oxide semiconductor thin film, a field effect transistor using the same and a method of fabricating the field effect transistor. The composition includes an aluminum oxide, a zinc oxide, an indium oxide and a tin oxide. The thin film formed of the composition is in amorphous phase. The field effect transistor having an active layer formed of the composition can have an improved electrical characteristic and be fabricated by a low temperature process.

Abstract: Provided is a semiconductor light emitting diode that uses a silicon nano dot and a method of manufacturing the same. The semiconductor light emitting diode includes a light emitting layer that emits light; a hole injection layer formed on the light emitting layer; an electron injection layer formed on the light emitting layer to face the hole injection layer; a metal layer that includes a metal nano dot and is formed on the electron injection layer; and a transparent conductive electrode formed on the metal layer. Amorphous silicon nitride that includes the silicon nano dot is used as the light emitting layer.

Abstract: Provided are a Schottky barrier tunnel single electron transistor and a method of manufacturing the same that use a Schottky barrier formed between metal and semiconductor by replacing a source and a drain with silicide as a reactant of silicon and metal, instead of a conventional method of manufacturing a single electron transistor (SET) that includes source and drain regions by implanting dopants such that an artificial quantum dot is formed in a channel region. As a result, it does not require a conventional PADOX process to form a quantum dot for a single electron transistor (SET), height and width of a tunneling barrier can be artificially adjusted by using silicide materials that have various Schottky junction barriers, and it is possible to improve current driving capability of the single electron transistor (SET).

Abstract: An n-type SBTT and a manufacturing method thereof are provided. The SBTT includes a silicon layer, a gate, a double layer that has a rare-earth metal silicide layer and a transition metal silicide layer. The silicon layer has a channel region. The gate is formed in an overlapping manner on the channel region and has a gate dielectric layer on its interface with respect to the silicon layer. The double layer is formed as a source/drain that has the channel region interposed on the silicon layer.

Abstract: An n-type SBTT and a manufacturing method thereof are provided. The SBTT includes a silicon layer, a gate, a double layer that has a rare-earth metal silicide layer and a transition metal silicide layer. The silicon layer has a channel region. The gate is formed in an overlapping manner on the channel region and has a gate dielectric layer on its interface with respect to the silicon layer. The double layer is formed as a source/drain that has the channel region interposed on the silicon layer.

Abstract: Provided are a method and apparatus for modeling source-drain current of a TFT. The method includes receiving sample data, the sample data including a sample input value and a sample output value; adjusting modeling variables according to the sample data; calculating a current model value according to the adjusted modeling variables; when a difference between the calculated current model value and the sample output value is smaller than a predetermined threshold value, fitting a current model by applying the adjusted modeling variables to the current model; applying actual input data to the fitted current model; and outputting a result value corresponding to the actual input data, wherein the current model is a model for predicting the source-drain current of the TFT.

Abstract: Provided is a semiconductor light emitting diode that uses a silicon nano dot and a method of manufacturing the same. The semiconductor light emitting diode includes a light emitting layer that emits light; a hole injection layer formed on the light emitting layer; an electron injection layer formed on the light emitting layer to face the hole injection layer; a metal layer that comprises a metal nano dot and is formed on the electron injection layer; and a transparent conductive electrode formed on the metal layer. Amorphous silicon nitride that includes the silicon nano dot is used as the light emitting layer.

Abstract: Due to the indirect transition characteristic of silicon semiconductors, the light extraction efficiency of a silicon-based light emitting diode is lower than that of a compound semiconductor-based light emitting diode. For this reason, there are difficulties in practically using and commercializing silicon-based light emitting diodes developed so far.

Abstract: Provided is a semiconductor optical device having a current-confined structure. The device includes a first semiconductor layer of a first conductivity type which is formed on a semiconductor substrate and includes one or more material layers, a second semiconductor layer which is formed on the first semiconductor layer and includes one or more material layers, and a third semiconductor layer of a second conductivity type which is formed on the second semiconductor layer and includes one or more material layers. One or more layers among the first semiconductor layer, the second semiconductor, and the third semiconductor layer have a mesa structure. A lateral portion of at least one of the material layers constituting the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer is recessed, and the recess is partially or wholly filled with an oxide layer, a nitride layer or a combination of them.

Abstract: A device using an ambipolar transport of an SB-MOSFET and a method for operating the same are provided. The SB-MOSFET includes: a silicon channel region; a source and a drain contacted on both sides of the channel region and formed of material including metal layer; and a gate formed on the channel region, with a gate dielectric layer interposed therebetween. Positive (+), 0 or negative (?) gate voltage is selectively applied to the gate, the channel becomes off-state when the gate voltage between a negative threshold voltage and a positive threshold voltage is applied, and the channel becomes a first on-state and a second on-state when the gate voltage is lower than the negative threshold voltage or higher than the positive threshold voltage. Accordingly, it is possible to implement three current states, that is, hole current, electron current, and no current. The SB-MOSFET can be applied to a multi-bit memory and/or multi-bit logic device.

Abstract: Provided are a Schottky barrier tunnel single electron transistor and a method of manufacturing the same that use a Schottky barrier formed between metal and semiconductor by replacing a source and a drain with silicide as a reactant of silicon and metal, instead of a conventional method of manufacturing a single electron transistor (SET) that includes source and drain regions by implanting dopants such that an artificial quantum dot is formed in a channel region. As a result, it does not require a conventional PADOX process to form a quantum dot for a single electron transistor (SET), height and width of a tunneling barrier can be artificially adjusted by using silicide materials that have various Schottky junction barriers, and it is possible to improve current driving capability of the single electron transistor (SET).

Abstract: Provided is a semiconductor optical device having a current-confined structure. The device includes a first semiconductor layer of a first conductivity type which is formed on a semiconductor substrate and includes one or more material layers, a second semiconductor layer which is formed on the first semiconductor layer and includes one or more material layers, and a third semiconductor layer of a second conductivity type which is formed on the second semiconductor layer and includes one or more material layers. One or more layers among the first semiconductor layer, the second semiconductor, and the third semiconductor layer have a mesa structure. A lateral portion of at least one of the material layers constituting the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer is recessed, and the recess is partially or wholly filled with an oxide layer, a nitride layer or a combination of them.

Abstract: Provided is a semiconductor optical device having a current-confined structure. The device includes a first semiconductor layer of a first conductivity type which is formed on a semiconductor substrate and includes one or more material layers, a second semiconductor layer which is formed on the first semiconductor layer and includes one or more material layers, and a third semiconductor layer of a second conductivity type which is formed on the second semiconductor layer and includes one or more material layers. One or more layers among the first semiconductor layer, the second semiconductor, and the third semiconductor layer have a mesa structure. A lateral portion of at least one of the material layers constituting the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer is recessed, and the recess is partially or wholly filled with an oxide layer, a nitride layer or a combination of them.

Abstract: The present invention relates to a method of fabricating vertical-cavity surface emitting lasers being watched as a light source for long wavelength communication. The present invention includes forming a layer having a high resistance near the surface by implanting heavy ions such as silicon (Si), so that the minimum current injection diameter is made very smaller unlike implantation of a proton. Further, the present invention includes regrowing crystal so that current can flow the epi surface in parallel to significantly reduce the resistance up to the current injection part formed by silicon (Si) ions. Therefore, the present invention can not only effectively reduce the current injection diameter but also significantly reduce the resistance of a device to reduce generation of a heat. Further, the present invention can further improve dispersion of a heat using InP upon regrowth and thus improve the entire performance of the device.