Abstract: A method of generating a photo mask for use during fabrication of a semiconductor device includes; generating an initial layout design including critical circuit paths and non-critical circuit paths by shielding all gate line patterns used to implement transistors in the critical circuits and non-critical circuits, and thereafter generating a layout design from the initial layout design by selectively un-shielding a non-critical gate line pattern among the gate line patterns used to implement a gate of a non-critical transistor in a non-critical circuit, while retaining the shielding of all critical gate line patterns among the gate line patterns.

Abstract: A new and distinct Citrus Reticulate Blanco plant named “Tamnaneunbong”, characterized by its upright plant type and strong vigor, short oval ovary shape, germination stage in middle of April, blooming stage in late May, fruits start coloring in late October, mature stage in late March, acidity of the fruit juice at about 1.51%, leaf length at about 10.1 cm and leaf width at about 4.3 cm, and length of leaf petiole at about 3.6 cm.

Abstract: A method of fabricating a semiconductor device having a first region, a second region, and a third region between the first and second regions includes forming first and second preliminary active patterns protruding from a substrate in the first and second regions, respectively, forming mask patterns exposing the third region on the substrate, performing a first etching process using the mask patterns an etch mask to form first and second active patterns, respectively, and forming gate structures on the substrate.

Abstract: A semiconductor device includes first and second memory cell regions adjacent to each other on a substrate. At least one active base and a shallow trench isolation may be sequentially laminated at a boundary between the first and second memory cell regions. First and second active fins are formed on respective sides of the shallow trench isolation, and the first and second active fins projecting from the active base. At least one deep trench isolation is formed on one side of the active base.

Abstract: A method of fabricating a semiconductor device having a first region, a second region, and a third region between the first and second regions includes forming first and second preliminary active patterns protruding from a substrate in the first and second regions, respectively, forming mask patterns exposing the third region on the substrate, performing a first etching process using the mask patterns an etch mask to form first and second active patterns, respectively, and forming gate structures on the substrate.

Abstract: A semiconductor device includes a substrate having an active region, a gate structure intersecting the active region and extending in a first direction parallel to a top surface of the substrate, a first source/drain region and a second source/drain region disposed in the active region at both sides of the gate structure, respectively, and a first modified contact and a second modified contact in contact with the first source/drain region and the second source/drain region, respectively. The distance between the gate structure and the first modified contact is smaller than the distance between the gate structure and the second modified contact.

Abstract: A lever type connector includes: a female housing having a box shape of which one portion is open; a male housing configured to be inserted into the female housing and provided with a plurality of male terminals; a lever configured to be rotatably coupled with an outer side of the male housing; and a movable plate configured to be mounted on a bottom surface of the male housing, have the bottom surface provided with a plurality of through holes through which the male terminals penetrate, and enclose the male terminal to protect the male terminals.

Abstract: Provided is a biopsy needle with an electrode array which measures impedance for a plurality of biopsy points in real time, in which the needle includes electrode patterns configured by a plurality of electrode arrays on the surface, and the electrode patterns are spaced apart from each other along the top and bottom of the needle. According to the present invention, it is possible to selectively measure a predetermined tissue around the needle according to a direction of electrode formation and the number of electrodes while measuring impedance by using a plurality of electrodes by proposing a biopsy needle with a plurality of electrode arrays on a surface.

Abstract: A method of fabricating a semiconductor device having a first region, a second region, and a third region between the first and second regions includes forming first and second preliminary active patterns protruding from a substrate in the first and second regions, respectively, forming mask patterns exposing the third region on the substrate, performing a first etching process using the mask patterns an etch mask to form first and second active patterns, respectively, and forming gate structures on the substrate.

Abstract: A walking robot and a control method thereof. The control method includes performing transition of a second leg to a toe-off state, when ground reaction force applied to a first leg exceeds a first set value under the condition that the first leg is in a swing state and the second leg is in a support state, performing transition of the second leg to the swing state and transition of the first leg to the support state, when ground reaction force applied to the second leg is below a second set value under the condition that the second leg is in the toe-off state, and achieving walking of the walking robot by repeating the transitions among the swing state, the support state and the toe-off state. Thereby, the control method allows the robot to more stably and naturally walk.

Abstract: A lever type connector includes: a female housing having a box shape of which one portion is open; a male housing configured to be inserted into the female housing and provided with a plurality of male terminals; a lever configured to be rotatably coupled with an outer side of the male housing; and a movable plate configured to be mounted on a bottom surface of the male housing, have the bottom surface provided with a plurality of through holes through which the male terminals penetrate, and enclose the male terminal to protect the male terminals.

Abstract: A method of fabricating a semiconductor device having a first region, a second region, and a third region between the first and second regions includes forming first and second preliminary active patterns protruding from a substrate in the first and second regions, respectively, forming mask patterns exposing the third region on the substrate, performing a first etching process using the mask patterns an etch mask to form first and second active patterns, respectively, and forming gate structures on the substrate.

Abstract: A coniferyl alcohol or a Compositae family, Brassicaceae family, Umbelliferae family, Lamiaceae family, Liliaceae family or Amaranthaceae plant extract provides various uses associated with hTRPA1 activation, and, being a natural compound, involves relatively few side effects in the body and has substantial industrial applicability. The coniferyl alcohol or the Compositae family, Brassicaceae family, Umbelliferae family, Lamiaceae family, Liliaceae family or Amaranthaceae plant extract of the present invention not only will be a novel medical or food raw material which is helpful in maintaining homeostasis in the body associated with hTRPA1 activation, but can also be used to advantage in hTRPA1 antagonist screening.

Abstract: A fin Field Effect Transistor (finFET) can include a source region and a drain region of the finFET. A gate of the finFET can cross over a fin of the finFET between the source and drain regions. First and second silicide layers can be on the source and drain regions respectively. The first and second silicide layers can include respective first and second surfaces that face the gate crossing over the fin, where the first and second surfaces are different sizes.

Abstract: A method of fabricating a semiconductor device having a first region, a second region, and a third region between the first and second regions includes forming first and second preliminary active patterns protruding from a substrate in the first and second regions, respectively, forming mask patterns exposing the third region on the substrate, performing a first etching process using the mask patterns an etch mask to form first and second active patterns, respectively, and forming gate structures on the substrate.

Abstract: A semiconductor device includes a substrate having an active region, a gate structure intersecting the active region and extending in a first direction parallel to a top surface of the substrate, a first source/drain region and a second source/drain region disposed in the active region at both sides of the gate structure, respectively, and a first modified contact and a second modified contact in contact with the first source/drain region and the second source/drain region, respectively. The distance between the gate structure and the first modified contact is smaller than the distance between the gate structure and the second modified contact.

Abstract: A standard cell library and a method of using the same may include information regarding a plurality of standard cells stored on a non-transitory computer-readable storage medium, wherein at least one of the plurality of standard cells includes a pin through which an input signal or an output signal of the at least one standard cell passes and including first and second regions perpendicular to a stack direction. When the via is disposed in the pin, the second region can provide a resistance value of the via smaller than that of the first region. The standard cell library may further include marker information corresponding to the second region.

Abstract: A method of generating a photo mask for use during fabrication of a semiconductor device includes; generating an initial layout design including critical circuit paths and non-critical circuit paths by shielding all gate line patterns used to implement transistors in the critical circuits and non-critical circuits, and thereafter generating a layout design from the initial layout design by selectively un-shielding a non-critical gate line pattern among the gate line patterns used to implement a gate of a non-critical transistor in a non-critical circuit, while retaining the shielding of all critical gate line patterns among the gate line patterns.

Abstract: A method of controlling walking a biped robot to generate a walking pattern maximally similar to that of a human includes generating a walking pattern, calculating a walking pattern similarity corresponding to the walking pattern, and comparing the walking pattern similarity with a predetermined reference pattern similarity, and changing the walking pattern based on a result of the comparison. When the robot walks, a knee is maximally stretched and a horizontal movement of a waist is minimized such that the walking pattern of the robot is maximally similar to that of a human, thus enhancing an affinity for a human being and increasing energy efficiency.

Abstract: A suspension type high-density storage rack for nuclear fuel assemblies may include a plurality of body parts each having a basket cell storing the corresponding nuclear fuel assembly and having a generally square tube-like shape elongated in a height direction thereof, a plurality of connection plates integrally connecting the basket cells adjacent to each other, while maintaining them at a predetermined distance, and a base plate fixedly coupling the undersides of the basket cells thereto; and a plurality of cap parts each closing the opened upper portion of the corresponding body part and suspending the corresponding nuclear fuel assembly therefrom.