Abstract: Example embodiments disclose an image sensor capable of preventing or reducing image lag and a method of manufacturing the same. Example methods may include forming a gate insulating film and a gate conductive film doped with a first-conductive-type dopant on a semiconductor substrate; forming a transfer gate pattern by patterning the gate insulating film and the gate conductive film; and fabricating a transfer gate electrode by forming a first-conductive-type photodiode in the semiconductor substrate adjacent to one region of the transfer gate pattern, by forming a second-conductive-type photodiode on the first-conductive-type photodiode, and by forming a first-conductive-type floating diffusion region in the semiconductor substrate adjacent to the other region of the transfer gate pattern.

Abstract: A method of fabricating an image sensor may include providing a substrate including light-receiving and non-light-receiving regions; forming a plurality of gates on the non-light-receiving region; ion-implanting a first-conductivity-type dopant into the light-receiving region to form a first dopant region of a pinned photodiode; primarily ion-implanting a second-conductivity-type dopant, different from the first-conductivity-type dopant, into an entire surface of the substrate, using the gates as a first mask; forming spacers on both side walls of the gates; and secondarily ion-implanting the second-conductivity-type dopant into the entire surface of the substrate, using the plurality of gates including the spacers as a second mask, to complete a second dopant region of the pinned photodiode.

Abstract: Disclosed is a image sensor (e.g., a CMOS image sensor) including pixels each having a transfer transistor and a drive transistor, in which the gate of at least one of the transistors has a boosting gate disposed over it comprised of a conductive film pattern with interposing an insulation film. Thus, a voltage applied to the boosting gate is capacitively coupled to at least one of the transfer gate of the transfer transistor and a drive gate of the drive transistor. The transfer gate is supplied with the sum of the transfer voltage and the boosting gate-coupling voltage as a result and there is no need for providing a high voltage generator for the image sensor. The dynamic range of operation may be enhanced if such a coupling voltage is applied to the drive gate of the drive transistor.

Abstract: Example embodiments disclose an image sensor capable of preventing or reducing image lag and a method of manufacturing the same. Example methods may include forming a gate insulating film and a gate conductive film doped with a first-conductive-type dopant on a semiconductor substrate; forming a transfer gate pattern by patterning the gate insulating film and the gate conductive film; and fabricating a transfer gate electrode by forming a first-conductive-type photodiode in the semiconductor substrate adjacent to one region of the transfer gate pattern, by forming a second-conductive-type photodiode on the first-conductive-type photodiode, and by forming a first-conductive-type floating diffusion region in the semiconductor substrate adjacent to the other region of the transfer gate pattern.

Abstract: A method of fabricating an image sensor may include providing a substrate including light-receiving and non-light-receiving regions; forming a plurality of gates on the non-light-receiving region; ion-implanting a first-conductivity-type dopant into the light-receiving region to form a first dopant region of a pinned photodiode; primarily ion-implanting a second-conductivity-type dopant, different from the first-conductivity-type dopant, into an entire surface of the substrate, using the gates as a first mask; forming spacers on both side walls of the gates; and secondarily ion-implanting the second-conductivity-type dopant into the entire surface of the substrate, using the plurality of gates including the spacers as a second mask, to complete a second dopant region of the pinned photodiode.

Abstract: An image sensor includes a substrate having an active pixel sensor region defined therein, a plurality of first conductivity type photodiodes formed in the active pixel sensor region and a first conductivity-type first deep well formed in the active pixel sensor region in a location which does not include the plurality of the first conductivity-type photodiodes. Moreover, the first deep well is electrically connected to a positive voltage.

Abstract: A handler may include a handler system main body used for testing semiconductor devices; an open-type stocker portion on a front side of the handler system main body; and/or a plurality of single-door-type stockers in the open-type stocker portion. The single-door-type stockers may include windows on upper parts of front sides of the single-door-type stockers. The front sides of the single-door-type stockers may be protected. The handler also may include a front top door on an upper part of the front side of the handler system main body; locking stoppers below the windows of the single-door-type stockers; safety sensors on sides of the open-type stocker portion; and/or a working table in front of the open-type stocker portion. The open-type stocker portion may be below the front top door. The safety sensors may stop the handler when the single-door-type stockers are not closed.

Abstract: An image sensor comprising a transfer gate electrode having a uniform impurity doping distribution is provided. The image sensor further comprises a semiconductor substrate comprising a pixel area, wherein the pixel area comprises an active region and the transfer gate electrode is disposed on the active region. A method of fabricating the image sensor is also provided. The method comprises preparing a semiconductor substrate, forming a polysilicon layer on the semiconductor substrate, doping the polysilicon layer with impurity ions, and patterning the polysilicon layer.

Abstract: In a CMOS image sensor and method of fabricating the same, the CMOS image sensor is comprised of a pixel array generating image signals and a peripheral circuit processing the image signals. In the method, a substrate is provided having a pixel region and a peripheral circuit region. A photo-receiving element and at least one transistor are formed on the pixel region of the substrate and a transistor is formed on the peripheral circuit region of the substrate. A silicide barrier pattern is formed to cover a region where the photo-receiving element is formed. A silicide layer is formed on a predetermined region of the substrate. An interlevel insulation film is formed on the silicide barrier layer. At least one contact hole penetrating the interlevel insulation film is formed, the at least one contact hole exposing a predetermined region of the silicide layer.

Abstract: Image sensors and methods of fabricating the same are provided. The image sensor includes a blocking pattern disposed on photodiodes. The blocking pattern is formed of insulation material having a metal diffusion coefficient which is lower than a silicon oxide diffusion coefficient. Therefore, dark defects of the image sensor are reduced. In addition, the image sensor includes a color-ratio control layer. The color ratio control layer controls color ratios between the sensitivities to blue, green and red. As a result, color distinction of the picture that is embodied by the image sensor can be improved.

Abstract: Image sensors and methods of fabricating the same are provided. The image sensor includes a blocking pattern disposed on photodiodes. The blocking pattern is formed of insulation material having a metal diffusion coefficient which is lower than a silicon oxide diffusion coefficient. Therefore, dark defects of the image sensor are reduced. In addition, the image sensor includes a color-ratio control layer. The color ratio control layer controls color ratios between the sensitivities to blue, green and red. As a result, color distinction of the picture that is embodied by the image sensor can be improved.

Abstract: Provided are methods of fabricating an image sensor. Embodiments of such methods can include forming a first gate insulation layer in a first region of a semiconductor substrate and a first gate electrode layer, to cover the first gate insulation layer and forming a second gate insulation layer within a nitrogen enhanced atmosphere and a second gate electrode layer in a second region of the semiconductor substrate. The methods also include patterning the first gate electrode layer and the first gate insulation layer of the first region to form a first gate pattern and patterning the second gate electrode layer and the second gate insulation layer of the second region to form a second gate pattern.

Abstract: A pogo pin of a contact-type of semiconductor test device will not be oxidized and will not damage of a solder ball of a semiconductor package when the pogo pin is brought into contact with the solder ball. The pogo pin includes an electrical contact of a conductive rubber material, and a spring extending from the bottom of the electrical contact. The test device includes an array of the pogo pins, and a housing that supports the array of pogo pins. The housing may include detachable members between which the pogo pins are interposed such that the pogo pins can be individually replaced.

Abstract: A method of fabricating an image sensor may include providing a substrate including light-receiving and non-light-receiving regions; forming a plurality of gates on the non-light-receiving region; ion-implanting a first-conductivity-type dopant into the light-receiving region to form a first dopant region of a pinned photodiode; primarily ion-implanting a second-conductivity-type dopant, different from the first-conductivity-type dopant, into an entire surface of the substrate, using the gates as a first mask; forming spacers on both side walls of the gates; and secondarily ion-implanting the second-conductivity-type dopant into the entire surface of the substrate, using the plurality of gates including the spacers as a second mask, to complete a second dopant region of the pinned photodiode.

Abstract: An image sensor and methods of fabricating the same are provided. An example method may include forming at least one gate on a substrate, forming first, second and third layers on the at least one gate, first etching the third layer with a first etching process, the second layer configured to be resistant to the first etching process, the first etching process reducing at least a portion of the third layer and exposing at least a portion of the second layer and second etching at least the exposed portion of the second layer with a second etching process other than the first etching process, the first layer configured to be resistant to the second etching process.

Abstract: A handler may include a handler system main body used for testing semiconductor devices; an open-type stocker portion on a front side of the handler system main body; and/or a plurality of single-door-type stockers in the open-type stocker portion. The single-door-type stockers may include windows on upper parts of front sides of the single-door-type stockers. The front sides of the single-door-type stockers may be protected. The handler also may include a front top door on an upper part of the front side of the handler system main body; locking stoppers below the windows of the single-door-type stockers; safety sensors on sides of the open-type stocker portion; and/or a working table in front of the open-type stocker portion. The open-type stocker portion may be below the front top door. The safety sensors may stop the handler when the single-door-type stockers are not closed.

Abstract: Example embodiments disclose an image sensor capable of preventing or reducing image lag and a method of manufacturing the same. Example methods may include forming a gate insulating film and a gate conductive film doped with a first-conductive-type dopant on a semiconductor substrate; forming a transfer gate pattern by patterning the gate insulating film and the gate conductive film; and fabricating a transfer gate electrode by forming a first-conductive-type photodiode in the semiconductor substrate adjacent to one region of the transfer gate pattern, by forming a second-conductive-type photodiode on the first-conductive-type photodiode, and by forming a first-conductive-type floating diffusion region in the semiconductor substrate adjacent to the other region of the transfer gate pattern.

Abstract: An image sensor includes a substrate having an active pixel sensor region defined therein, a plurality of first conductivity type photodiodes formed in the active pixel sensor region and a first conductivity-type first deep well formed in the active pixel sensor region in a location which does not include the plurality of the first conductivity-type photodiodes. Moreover, the first deep well is electrically connected to a positive voltage.

Abstract: Provided are methods of fabricating an image sensor. Embodiments of such methods can include forming a first gate insulation layer in a first region of a semiconductor substrate and a first gate electrode layer, to cover the first gate insulation layer and forming a second gate insulation layer within a nitrogen enhanced atmosphere and a second gate electrode layer in a second region of the semiconductor substrate. The methods also include patterning the first gate electrode layer and the first gate insulation layer of the first region to form a first gate pattern and patterning the second gate electrode layer and the second gate insulation layer of the second region to form a second gate pattern.

Abstract: In a CMOS image sensor and method of fabricating the same, the CMOS image sensor is comprised of a pixel array generating image signals and a peripheral circuit processing the image signals. In the method, a substrate is provided having a pixel region and a peripheral circuit region. A photo-receiving element and at least one transistor are formed on the pixel region of the substrate and a transistor is formed on the peripheral circuit region of the substrate. A silicide barrier pattern is formed to cover a region where the photo-receiving element is formed. A silicide layer is formed on a predetermined region of the substrate. An interlevel insulation film is formed on the silicide barrier layer. At least one contact hole penetrating the interlevel insulation film is formed, the at least one contact hole exposing a predetermined region of the silicide layer.