Patents by Inventor Jae-Hong Hahn

Jae-Hong Hahn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100164442
    Abstract: In general, in one aspect, the disclosure describes a system comprising a power converter, a power delivery network, a load, and a communication link between the power converter and the load. The communication link is to implement a training sequence to dynamically adjust parameters of the power converter and set load-line slope based on implementation of the system. The load includes a training capability to generate stimuli having defined patterns and to update on the stimuli application to the power converter over the communication link. The power converter includes a controller to measure noise amplitude in a power output based on the stimuli, to adjust loop parameters to reduce the noise amplitude, and to set the load-line for the power converter based on the adjusting.
    Type: Application
    Filed: December 31, 2008
    Publication date: July 1, 2010
    Inventors: Omer Vikinski, Jae-Hong Hahn, Kobi Littman
  • Patent number: 7733204
    Abstract: In some embodiments, a configurable multiphase coupled magnetic structure may include a four-sided pot core defining an interior space, one or more cylindrical cores disposed within the interior space of the four-sided pot core, and at least two windings respectively wound around the one or more cylindrical cores, wherein the at least two windings are connected in a multiphase power delivery configuration. The windings may be multi-turn windings. The four-sided pot core may be a rectangular-shaped pot core. The cylindrical cores may be I-cores. Other embodiments are disclosed and claimed.
    Type: Grant
    Filed: June 29, 2006
    Date of Patent: June 8, 2010
    Assignee: Intel Corporation
    Inventors: Jae-Hong Hahn, Jorge Rodrignez, Don Nguyen
  • Publication number: 20080238378
    Abstract: In some embodiments, a voltage regulator assembly comprises a first voltage regulator circuit selectively coupled to a first input voltage and comprising a first inductor, a second regulator circuit selectively coupled to the first input voltage and comprising a second inductor to inductively couple the second regulator circuit to the first voltage regulator circuit, a bypass switch coupled to the second regulator circuit, and a controller coupled to the bypass switch comprising logic to activate the bypass switch when a load on the voltage regulator assembly falls below a threshold. Other embodiments may be described.
    Type: Application
    Filed: March 30, 2007
    Publication date: October 2, 2008
    Inventors: Alexander Uan-Zo-li, Jae-Hong Hahn
  • Patent number: 7358770
    Abstract: A circuit includes a first driver, a second driver, and a transformer coupled to the first and second driver. In operation, the first driver receives a first signal from a first input port, the second driver receives a time-delayed version of the first signal from a second input port, and the transformer provides provide an output signal to an output port. A method includes receiving a first input signal, receiving a second input signal, and then processing the first input signal and the second input signal. The second input signal is a time-delayed version of the first input signal and the processing of the first input signal and the second input signal generates a half-raised cosine signal.
    Type: Grant
    Filed: March 21, 2006
    Date of Patent: April 15, 2008
    Inventors: Gerhard Schrom, Peter Hazucha, Jae-Hong Hahn, Vivek K. De
  • Publication number: 20080001693
    Abstract: In some embodiments, a configurable multiphase coupled magnetic structure may include a four-sided pot core defining an interior space, one or more cylindrical cores disposed within the interior space of the four-sided pot core, and at least two windings respectively wound around the one or more cylindrical cores, wherein the at least two windings are connected in a multiphase power delivery configuration. The windings may be multi-turn windings. The four-sided pot core may be a rectangular-shaped pot core. The cylindrical cores may be I-cores. Other embodiments are disclosed and claimed.
    Type: Application
    Filed: June 29, 2006
    Publication date: January 3, 2008
    Inventors: Jae-Hong Hahn, Jorge Rodriguez, Don Nguyen
  • Publication number: 20070052446
    Abstract: A circuit includes a first driver, a second driver, and a transformer coupled to the first and second driver. In operation, the first driver receives a first signal from a first input port, the second driver receives a time-delayed version of the first signal from a second input port, and the transformer provides provide an output signal to an output port. A method includes receiving a first input signal, receiving a second input signal, and then processing the first input signal and the second input signal. The second input signal is a time-delayed version of the first input signal and the processing of the first input signal and the second input signal generates a half-raised cosine signal.
    Type: Application
    Filed: March 21, 2006
    Publication date: March 8, 2007
    Inventors: Gerhard Schrom, Peter Hazucha, Jae-Hong Hahn, Vivek De
  • Patent number: 7015720
    Abstract: A circuit includes a first driver, a second driver, and a transformer coupled to the first and second driver. In operation, the first driver receives a first signal from a first input port, the second driver receives a time-delayed version of the first signal from a second input port, and the transformer provides provide an output signal to an output port. A method includes receiving a first input signal, receiving a second input signal, and then processing the first input signal and the second input signal. The second input signal is a time-delayed version of the first input signal and the processing of the first input signal and the second input signal generates a half-raised cosine signal.
    Type: Grant
    Filed: December 29, 2003
    Date of Patent: March 21, 2006
    Assignee: Intel Corporation
    Inventors: Gerhard Schrom, Peter Hazucha, Jae-Hong Hahn, Vivek K. De
  • Publication number: 20050146356
    Abstract: A circuit includes a first driver, a second driver, and a transformer coupled to the first and second driver. In operation, the first driver receives a first signal from a first input port, the second driver receives a time-delayed version of the first signal from a second input port, and the transformer provides provide an output signal to an output port. A method includes receiving a first input signal, receiving a second input signal, and then processing the first input signal and the second input signal. The second input signal is a time-delayed version of the first input signal and the processing of the first input signal and the second input signal generates a half-raised cosine signal.
    Type: Application
    Filed: December 29, 2003
    Publication date: July 7, 2005
    Inventors: Gerhard Schrom, Peter Hazucha, Jae-Hong Hahn, Vivek De
  • Patent number: 6801026
    Abstract: According to some embodiments, a plurality of single-phase hysteretic converters operate in accordance with associated synchronization signals.
    Type: Grant
    Filed: December 20, 2002
    Date of Patent: October 5, 2004
    Assignee: Intel Corporation
    Inventors: Gerhard Schrom, Jae-Hong Hahn, Peter Hazucha
  • Patent number: 6798256
    Abstract: A buffer circuit includes a resonant circuit. An output of the resonant buffer circuit transitions once for three transitions on an input.
    Type: Grant
    Filed: April 30, 2003
    Date of Patent: September 28, 2004
    Assignee: Intel Corporation
    Inventors: Peter Hazucha, Gerhard Schrom, Jae-Hong Hahn
  • Publication number: 20040120169
    Abstract: According to some embodiments, a plurality of single-phase hysteretic converters operate in accordance with associated synchronization signals.
    Type: Application
    Filed: December 20, 2002
    Publication date: June 24, 2004
    Inventors: Gerhard Schrom, Jae-Hong Hahn, Peter Hazucha