Patents by Inventor Jae Hong Jang

Jae Hong Jang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11983248
    Abstract: Disclosed herein are an apparatus and method for classifying clothing attributes based on deep learning. The apparatus includes memory for storing at least one program and a processor for executing the program, wherein the program includes a first classification unit for outputting a first classification result for one or more attributes of clothing worn by a person included in an input image, a mask generation unit for outputting a mask tensor in which multiple mask layers respectively corresponding to principal part regions obtained by segmenting a body of the person included in the input image are stacked, a second classification unit for outputting a second classification result for the one or more attributes of the clothing by applying the mask tensor, and a final classification unit for determining and outputting a final classification result for the input image based on the first classification result and the second classification result.
    Type: Grant
    Filed: October 7, 2021
    Date of Patent: May 14, 2024
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Chan-Kyu Park, Do-Hyung Kim, Jae-Hong Kim, Jae-Yeon Lee, Min-Su Jang
  • Publication number: 20240135556
    Abstract: Provided are a device and method for tagging training data. The method includes detecting and tracking one or more objects included in a video using artificial intelligence (AI), when there is an object to be split in a result of tracking the detected objects, splitting the object in object units, and when there are identical objects to be merged among split objects, merging the objects.
    Type: Application
    Filed: October 18, 2023
    Publication date: April 25, 2024
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Ho Sub YOON, Jae Hong KIM, Jong Won MOON, Jae Yoon JANG
  • Publication number: 20240091767
    Abstract: A gene amplification chip includes a chamber layer, a cover layer, a bottom layer, an inlet, and an outlet. The chamber layer has a first passage and through holes which are formed on one side of the first passage. The cover layer is disposed on one side of the chamber layer and has a cover channel formed to communicate with the first passage and the through holes, wherein the cover channel, the first passage and the through holes allow passage of liquids in a divided manner. The bottom layer is disposed on another side of the chamber layer and has a bottom channel formed to communicate with the first passage and the through holes. The inlet is formed in the cover layer and communicates with the cover channel. The outlet communicates with any one of the cover channel and the bottom channel.
    Type: Application
    Filed: December 15, 2022
    Publication date: March 21, 2024
    Applicant: SAMSUNG ELECTRONICS CO, LTD.
    Inventors: Jae Hong LEE, Won Jong JUNG, Kak NAMKOONG, Hyeong Seok JANG, Jin Ha KIM, Hyung Jun YOUN
  • Patent number: 11926950
    Abstract: Disclosed is a laundry treatment apparatus including a drum formed of a metal material and provided to accommodate laundry therein, an induction module spaced apart from a circumferential surface of the drum and provided to heat the circumferential surface of the drum via a magnetic field that is generated when current is applied to a coil, and a lifter formed of a metal material and provided in the drum to move the laundry inside the drum when the drum rotates. The lifter is provided so as to be recessed in a direction in which a distance between the induction module and the lifter, which face each other, increases.
    Type: Grant
    Filed: November 18, 2021
    Date of Patent: March 12, 2024
    Assignee: LG Electronics Inc.
    Inventors: Jae Hyuk Jang, Hyunwoo Noh, Changoh Kim, Woo Re Kim, Sangwook Hong
  • Patent number: 11925021
    Abstract: A semiconductor device, and method of manufacturing a semiconductor device, includes second conductive patterns separated from each other above a first stack structure which is penetrated by first channel structures and enclosing second channel structures coupled to the first channel structures, respectively. Each of the second conductive patterns includes electrode portions stacked in a first direction and at least one connecting portion extending in the first direction to be coupled to the electrode portions.
    Type: Grant
    Filed: December 13, 2021
    Date of Patent: March 5, 2024
    Assignee: SK hynix Inc.
    Inventors: Young Geun Jang, Wan Sup Shin, Ki Hong Lee, Jae Jung Lee
  • Patent number: 6668035
    Abstract: The present invention relates to a structure of a delta-sigma fractional type divider. The divider structure adds an external input value and an output value of a delta-sigma modulator to modulate a value of a swallow counter. Therefore, the present invention can provide a delta-sigma fractional type divider the structure is simple and that can obtain an effect of a structure of a delta sigma mode while having a wide-band frequency mixing capability.
    Type: Grant
    Filed: June 24, 2002
    Date of Patent: December 23, 2003
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Seon Ho Han, Jang Hong Choi, Jae Hong Jang, Hyun Kyu Yu
  • Publication number: 20030108143
    Abstract: The present invention relates to a structure of a delta-sigma factional divider. The divider structure adds an external input value and an output value of a delta-sigma modulator to modulate a value of a swallow counter. Therefore, the present invention can provide a delta-sigma factional divider the structure is simple and that can obtain an effect of a delta sigma mode while having a wide-band frequency mixing capability.
    Type: Application
    Filed: June 24, 2002
    Publication date: June 12, 2003
    Inventors: Seon Ho Han, Jang Hong Choi, Jae Hong Jang, Hyun Kyu Yu
  • Patent number: RE40424
    Abstract: The present invention relates to a structure of a delta-sigma fractional type divider. The divider structure adds an external input value and an output value of a delta-sigma modulator to modulate a value of a swallow counter. Therefore, the present invention can provide a delta-sigma fractional type divider the structure is simple and that can obtain an effect of a structure of a delta sigma mode while having a wide-band frequency mixing capability.
    Type: Grant
    Filed: December 22, 2005
    Date of Patent: July 8, 2008
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Seon-Ho Han, Jang-Hong Choi, Jae-Hong Jang, Hyun-Kyu Yu