Patents by Inventor Jae Hwan CHO

Jae Hwan CHO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12252781
    Abstract: Disclosed is a method of forming an area-selective thin film, the method comprising supplying a nuclear growth retardant to the inside of the chamber in which the substrate is placed, so that the nuclear growth retardant is adsorbed to a non-growth region of the substrate; purging the interior of the chamber; supplying a precursor to the inside of the chamber, so that the precursor is adsorbed to a growth region of the substrate; purging the interior of the chamber; and supplying a reaction material to the inside of the chamber, so that the reaction material reacts with the adsorbed precursor to form the thin film.
    Type: Grant
    Filed: January 5, 2022
    Date of Patent: March 18, 2025
    Assignee: EGTM CO., LTD.
    Inventors: Jae Min Kim, Ha Na Kim, Woong Jin Choi, Ji Yeon Han, Ju Hwan Jeong, Hyeon Sik Cho
  • Patent number: 12249491
    Abstract: The inventive concept relates to a substrate support unit provided in an apparatus for treating a substrate using plasma. In an embodiment, the substrate support unit includes a dielectric plate on which the substrate is placed, a lower electrode that is disposed under the dielectric plate and that has a first diameter, a power supply rod that applies RF power to the lower electrode and has a second diameter, and a ground member disposed under the lower electrode and spaced apart from the lower electrode by a first gap by an insulating member, the ground member including a plate portion having a through-hole formed therein through which the power supply rod passes, in which the through-hole has a third diameter.
    Type: Grant
    Filed: August 6, 2021
    Date of Patent: March 11, 2025
    Assignee: SEMES CO., LTD.
    Inventors: Hyoungkyu Son, Jong-Hwan An, Jae Hyun Cho, Min Keun Bae, Dong Suk Kim, Hyeon Gyu Kim, Ogsen Galstyan, Won Seok Lee, Sung Je Kim
  • Patent number: 12230750
    Abstract: A button-type secondary battery according to the present disclosure includes: an electrode assembly; a lower can configured to accommodate the electrode assembly; an upper can coupled to an opening of the lower can; a gasket configured to insulate a coupling portion between the lower can and the upper can; and a center part provided at a core portion of the electrode assembly, wherein the center part includes: a center pin inserted into the core portion of the electrode assembly; and an upper plate provided with an upper cover surface provided on an upper end of the center pin to protect an upper portion of the electrode assembly, wherein an edge of the upper cover surface is provided to be supported on an inner wall of the lower can.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: February 18, 2025
    Assignee: LG ENERGY SOLUTION, LTD.
    Inventors: Min Su Cho, Joo Hwan Sung, Yong Gon Lee, Je Jun Lee, Jae Won Lim, Geon Woo Min, Min Gyu Kim, Sang Hak Chae
  • Publication number: 20250046257
    Abstract: A display device includes a circuit layer including emission pixel drivers, and data lines transferring data signals of the emission pixel drivers; a data driver generating the data signals of the emission pixel drivers; and a demultiplexer circuit electrically connected between the data driver and the data lines and including a first demultiplexer transistor turned on by a first demultiplexer control signal and a second demultiplexer transistor turned on by a second demultiplexer control signal. A first data line of the data lines is electrically connected to the data driver through the first demultiplexer transistor and a transfer path shorter than a first extension length. A second data line of the data lines is electrically connected to the data driver through the second demultiplexer transistor and a transfer path longer than or equal to the first extension length.
    Type: Application
    Filed: April 30, 2024
    Publication date: February 6, 2025
    Applicant: Samsung Display Co., LTD.
    Inventors: Byeong Soo KANG, Man Sung KIM, Tae Ho KIM, Yong Ho SUNG, Seung Jun LEE, Yong Su LEE, Jae Woo LEE, Sang Min JEON, Seung Hwan CHO
  • Patent number: 11710788
    Abstract: A semiconductor device may include active patterns extended in a first direction and spaced apart from each other in the first direction, a device isolation layer defining the active patterns, an insulating structure provided between the active patterns and between the device isolation layer, and a gate structure disposed on the insulating structure and extended in a second direction crossing the first direction. The gate structure may include an upper portion and a lower portion. The lower portion of the gate structure may be enclosed by the insulating structure.
    Type: Grant
    Filed: December 6, 2021
    Date of Patent: July 25, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyujin Kim, Hui-Jung Kim, Junsoo Kim, Sangho Lee, Jae-Hwan Cho, Yoosang Hwang
  • Patent number: 11348996
    Abstract: Disclosed are semiconductor devices including support patterns and methods of fabricating the same. The semiconductor devices may include a plurality of vertical structures on a substrate and a support pattern that contacts sidewalls of the plurality of vertical structures. The support pattern may include a plurality of support holes extending through the support pattern. The plurality of support holes may include a first support hole and a second support hole that are spaced apart from each other, and the first support hole may have a shape or size different from a shape or size of the second support hole.
    Type: Grant
    Filed: April 28, 2020
    Date of Patent: May 31, 2022
    Inventors: Jae-Hwan Cho, Sangho Lee, Yoosang Hwang
  • Publication number: 20220130950
    Abstract: Disclosed are semiconductor devices including support patterns and methods of fabricating the same. The semiconductor devices may include a plurality of vertical structures on a substrate and a support pattern that contacts sidewalls of the plurality of vertical structures. The support pattern may include a plurality of support holes extending through the support pattern. The plurality of support holes may include a first support hole and a second support hole that are spaced apart from each other, and the first support hole may have a shape or size different from a shape or size of the second support hole.
    Type: Application
    Filed: January 5, 2022
    Publication date: April 28, 2022
    Inventors: Jae-Hwan Cho, Sangho Lee, Yoosang Hwang
  • Publication number: 20220093796
    Abstract: A semiconductor device may include active patterns extended in a first direction and spaced apart from each other in the first direction, a device isolation layer defining the active patterns, an insulating structure provided between the active patterns and between the device isolation layer, and a gate structure disposed on the insulating structure and extended in a second direction crossing the first direction. The gate structure may include an upper portion and a lower portion. The lower portion of the gate structure may be enclosed by the insulating structure.
    Type: Application
    Filed: December 6, 2021
    Publication date: March 24, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Kyujin KIM, Hui-Jung KIM, Junsoo KIM, Sangho LEE, Jae-Hwan CHO, Yoosang HWANG
  • Publication number: 20220013328
    Abstract: The inventive concept provides a substrate treating apparatus. The substrate treating apparatus includes a process chamber configured to form a treatment space, a gas supply unit configured to supply a process gas into an interior of the process chamber, a plasma generating unit configured to generate plasma from the process gas introduced into the interior of the process chamber, and a substrate support unit provided in the treatment space and configured to support a substrate, the substrate support unit may include a first plate, and a second plate that is adjacent to the first plate, and a gap may be formed between the first plate and the second plate, and a supply pipe is configured to supply a gas into the space defined by the gap.
    Type: Application
    Filed: July 1, 2021
    Publication date: January 13, 2022
    Applicant: SEMES CO., LTD.
    Inventors: JE HO KIM, JAE HWAN CHO, TAESUK JUNG
  • Patent number: 11195950
    Abstract: A semiconductor device may include active patterns extended in a first direction and spaced apart from each other in the first direction, a device isolation layer defining the active patterns, an insulating structure provided between the active patterns and between the device isolation layer, and a gate structure disposed on the insulating structure and extended in a second direction crossing the first direction. The gate structure may include an upper portion and a lower portion. The lower portion of the gate structure may be enclosed by the insulating structure.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: December 7, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyujin Kim, Hui-Jung Kim, Junsoo Kim, Sangho Lee, Jae-Hwan Cho, Yoosang Hwang
  • Publication number: 20210043722
    Abstract: Disclosed are semiconductor devices including support patterns and methods of fabricating the same. The semiconductor devices may include a plurality of vertical structures on a substrate and a support pattern that contacts sidewalls of the plurality of vertical structures. The support pattern may include a plurality of support holes extending through the support pattern. The plurality of support holes may include a first support hole and a second support hole that are spaced apart from each other, and the first support hole may have a shape or size different from a shape or size of the second support hole.
    Type: Application
    Filed: April 28, 2020
    Publication date: February 11, 2021
    Inventors: JAE-HWAN CHO, SANGHO LEE, YOOSANG HWANG
  • Publication number: 20210005506
    Abstract: A semiconductor device may include active patterns extended in a first direction and spaced apart from each other in the first direction, a device isolation layer defining the active patterns, an insulating structure provided between the active patterns and between the device isolation layer, and a gate structure disposed on the insulating structure and extended in a second direction crossing the first direction. The gate structure may include an upper portion and a lower portion. The lower portion of the gate structure may be enclosed by the insulating structure.
    Type: Application
    Filed: December 20, 2019
    Publication date: January 7, 2021
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Kyujin KIM, Hui-Jung KIM, Junsoo KIM, Sangho LEE, Jae-Hwan CHO, Yoosang HWANG
  • Patent number: 10636631
    Abstract: Disclosed is a substrate treating apparatus. The substrate treating apparatus includes a process chamber having a treatment space in the interior thereof, a support unit located in the process chamber to support a substrate, a gas supply unit configured to supply a process gas into the interior of the process chamber, a plasma generating unit including an upper electrode having a through-hole, through which the process gas flows, and a shower head having a hole, through which the process gas is ejected into the treatment space, and an inspection unit configured to inspect a coupling state of the shower head and the upper electrode while an optical fiber is interposed between the upper electrode and the shower head.
    Type: Grant
    Filed: August 2, 2018
    Date of Patent: April 28, 2020
    Assignee: SEMES CO., LTD.
    Inventors: Jae Hwan Cho, Hyung Joon Kim
  • Publication number: 20190043699
    Abstract: Disclosed is a substrate treating apparatus. The substrate treating apparatus includes a process chamber having a treatment space in the interior thereof, a support unit located in the process chamber to support a substrate, a gas supply unit configured to supply a process gas into the interior of the process chamber, a plasma generating unit including an upper electrode having a through-hole, through which the process gas flows, and a shower head having a hole, through which the process gas is ejected into the treatment space, and an inspection unit configured to inspect a coupling state of the shower head and the upper electrode while an optical fiber is interposed between the upper electrode and the shower head.
    Type: Application
    Filed: August 2, 2018
    Publication date: February 7, 2019
    Inventors: Jae Hwan CHO, Hyung Joon KIM