Patents by Inventor Jae-hwan Moon

Jae-hwan Moon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240144893
    Abstract: A display panel includes an amorphous silicon gate driver in which a lower voltage than the gate-off voltage output from the gate driver is applied to an adjacent stage as a low voltage transmission signal.
    Type: Application
    Filed: January 10, 2024
    Publication date: May 2, 2024
    Inventors: JAE-HOON LEE, SEUNG-HWAN MOON, YONG-SOON LEE, YOUNG-SU KIM, CHANG-HO LEE, WHEE-WON LEE, JUN-YONG SONG, YU-HAN BAE
  • Publication number: 20240118196
    Abstract: In the case of a gas in which several gases are mixed, a type and concentration of the gas may be incorrectly measured when measured using only an optical band-pass filter. The invention of the present application is directed to providing a technology in which a plurality of broadband band-pass filters having overlapping regions are provided to calculate a magnitude of absorption for each wavelength band for light passing through each broadband band-pass filter, thereby identifying the presence of a gas of interest and the presence of a gas other than the gas of interest.
    Type: Application
    Filed: September 8, 2023
    Publication date: April 11, 2024
    Inventors: Cheol Woo NAM, Byung Yul MOON, Eung Yul KIM, Jae Hwan KIM, Chun Ho SHIN, Kwang Hun PARK, Myun Gu CHOI, Chang Hwang CHOI, Yong Geol KIM, Jae Min JEON
  • Patent number: 11923124
    Abstract: A coil component includes a body having one surface, and one end surface and the other end surface, respectively connected to the one surface and opposing each other, a support substrate embedded in the body, and a coil portion disposed on the support substrate and including first and second lead-out patterns respectively exposed from surfaces of the body. The first lead-out pattern is exposed from the one surface of the body and the one end surface of the body. The second lead-out pattern is exposed from the one surface of the body and the other end surface of the body. The body includes an anchor portion disposed in each of the first and second lead-out patterns.
    Type: Grant
    Filed: August 2, 2019
    Date of Patent: March 5, 2024
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Ju Hwan Yang, Jae Hun Kim, Joung Gul Ryu, Byung Soo Kang, Byeong Cheol Moon, Jeong Gu Yeo
  • Patent number: 8450170
    Abstract: Provided are a semiconductor device and a method of forming the semiconductor device. The semiconductor device includes an active region of which an edge is curved. The semiconductor device includes a gate insulating layer, a floating gate, a gate interlayer dielectric layer and a control gate line on the active region. The semiconductor device includes an oxide pattern having a concave top surface between adjacent floating gates. The control gate may be sufficiently spaced apart from the active region by the oxide pattern. The method can provide a semiconductor device that includes a reoxidation process, an active region having a curved edge and an oxide pattern having a top surface of a curved concave shape.
    Type: Grant
    Filed: April 26, 2011
    Date of Patent: May 28, 2013
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Ki-Yeol Byun, Chan-Kwang Park, Jae-Hwan Moon, Tae-Wan Lim, Seung-Ah Kim
  • Publication number: 20110201189
    Abstract: Provided are a semiconductor device and a method of forming the semiconductor device. The semiconductor device includes an active region of which an edge is curved. The semiconductor device includes a gate insulating layer, a floating gate, a gate interlayer dielectric layer and a control gate line on the active region. The semiconductor device includes an oxide pattern having a concave top surface between adjacent floating gates. The control gate may be sufficiently spaced apart from the active region by the oxide pattern. The method can provide a semiconductor device that includes a reoxidation process, an active region having a curved edge and an oxide pattern having a top surface of a curved concave shape.
    Type: Application
    Filed: April 26, 2011
    Publication date: August 18, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ki-Yeol Byun, Chan-Kwang Park, Jae-Hwan Moon, Tae-Wan Lim, Seung-Ah Kim
  • Patent number: 7952134
    Abstract: Provided are a semiconductor device and a method of forming the semiconductor device. The semiconductor device includes an active region of which an edge is curved. The semiconductor device includes a gate insulating layer, a floating gate, a gate interlayer dielectric layer and a control gate line on the active region. The semiconductor device includes an oxide pattern having a concave top surface between adjacent floating gates. The control gate may be sufficiently spaced apart from the active region by the oxide pattern. The method can provide a semiconductor device that includes a reoxidation process, an active region having a curved edge and an oxide pattern having a top surface of a curved concave shape.
    Type: Grant
    Filed: October 2, 2008
    Date of Patent: May 31, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ki-Yeol Byun, Chan-Kwang Park, Jae-Hwan Moon, Tae-Wan Lim, Seung-Ah Kim
  • Publication number: 20090102009
    Abstract: Provided are a semiconductor device and a method of forming the semiconductor device. The semiconductor device includes an active region of which an edge is curved. The semiconductor device includes a gate insulating layer, a floating gate, a gate interlayer dielectric layer and a control gate line on the active region. The semiconductor device includes an oxide pattern having a concave top surface between adjacent floating gates. The control gate may be sufficiently spaced apart from the active region by the oxide pattern. The method can provide a semiconductor device that includes a reoxidation process, an active region having a curved edge and an oxide pattern having a top surface of a curved concave shape.
    Type: Application
    Filed: October 2, 2008
    Publication date: April 23, 2009
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Ki-Yeol Byun, Chan-Kwang Park, Jae-Hwan Moon, Tae-Wan Lim, Seung-Ah Kim
  • Patent number: 6759748
    Abstract: A wiring structure of a semiconductor device and a method for manufacturing the same are provided. The wiring structure according to the present invention includes a body formed of a first conductive material in a first insulating film on a semiconductor substrate and a protrusion formed of a second conductive material in a second insulating film formed on the first insulating film, connected to the upper surface of the body, formed to have a width less than that of the body, and having a planarized upper surface.
    Type: Grant
    Filed: December 6, 2001
    Date of Patent: July 6, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-hwan Moon, Gyu-chul Kim
  • Publication number: 20020053687
    Abstract: A wiring structure of a semiconductor device and a method for manufacturing the same are provided. The wiring structure according to the present invention includes a body formed of a first conductive material in a first insulating film on a semiconductor substrate and a protrusion formed of a second conductive material in a second insulating film formed on the first insulating film, connected to the upper surface of the body, formed to have a width less than that of the body, and having a planarized upper surface.
    Type: Application
    Filed: December 6, 2001
    Publication date: May 9, 2002
    Inventors: Jae-hwan Moon, Gyu-chul Kim
  • Patent number: 6355515
    Abstract: A wiring structure of a semiconductor device and a method for manufacturing the same are provided. The wiring structure according to the present invention includes a body formed of a conductive material in a first insulating film on a semiconductor substrate and a protrusion formed of a conductive material in a second insulating film formed on the first insulating film, connected to the upper surface of the body, formed to have a width less than that of the body, and having a planarized upper surface.
    Type: Grant
    Filed: July 22, 1999
    Date of Patent: March 12, 2002
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-hwan Moon, Gyu-chul Kim