Abstract: The present invention relates to a composition for preventing or treating transplantation rejection or a transplantation rejection disease, comprising a novel compound and a calcineurin inhibitor. A co-administration of the present invention 1) reduces the activity of pathogenic Th1 cells or Th17 cells, 2) increases the activity of Treg cells, 3) has an inhibitory effect against side effects, such as tissue damage, occurring in the sole administration thereof, 4) inhibits various pathogenic pathways, 5) inhibits the cell death of inflammatory cells, and 6) increases the activity of mitochondria, in an in vivo or in vitro allogenic model, a transplantation rejection disease model, a skin transplantation model, and a liver-transplanted patient, and thus inhibits transplantation rejection along with mitigating side effects possibly occurring in the administration of a conventional immunosuppressant alone.

Abstract: A paint composition is prepared by mixing each of an acrylic resin, an acrylic polyol resin, a polycarbonate diol resin, a diisocyanate, a solvent, and an antibacterial agent in appropriate amounts. As a result, the paint composition has improved physical properties and effective antibacterial activities.

Abstract: A device for locating a noise occurring in a steering system includes: a sound receiving unit detecting noise occurring in a steering system; a processing unit inputting data on the noise in the steering system into a neural network model that performs learning in advance and locating a position or a component at which the noise occurs in the steering system, the noise being detected by the sound receiving unit; and a storage unit in which the neural network model that performs the learning in advance is stored.

Abstract: Methods and systems for executing tracking and monitoring manufacturing data of a battery are disclosed. One method includes: receiving, by a server system, sensing data of the battery from a sensing system; generating, by the server system, mapping data based on the sensing data; generating, by the server system, identification data of the battery based on the sensing data; generating, by the server system, monitoring data of the battery based on the sensing data, the identification data, and the mapping data; and generating, by the server system, display data for displaying a simulated electrode of the battery on a graphical user interface based on the monitoring data of the battery.

Abstract: A fuse latch of a semiconductor device including PMOS transistors and NMOS transistors includes a data transmission circuit configured to transmit data to a first node and a second node in response to a first control signal, a latch circuit configured to latch the data received from the data transmission circuit through the first node and the second node, and a data output circuit configured to output the data latched by the latch circuit in response to a second control signal. NMOS transistors contained in the data transmission circuit, the latch circuit, and the data output circuit may be formed in first, fourth, and fifth active regions, PMOS transistors are formed in second and third active regions, and the first to fifth active regions are sequentially arranged in a first direction.

Abstract: A fuse latch of a semiconductor device including PMOS transistors and NMOS transistors includes a data transmission circuit configured to transmit data to a first node and a second node in response to a first control signal, a latch circuit configured to latch the data received from the data transmission circuit through the first node and the second node, and a data output circuit configured to output the data latched by the latch circuit in response to a second control signal. NMOS transistors contained in the data transmission circuit, the latch circuit, and the data output circuit may be formed in first, fourth, and fifth active regions, PMOS transistors are formed in second and third active regions, and the first to fifth active regions are sequentially arranged in a first direction.

Abstract: A semiconductor device is disclosed. The semiconductor device includes a first cell array and a second cell array, a first main word line disposed over the first cell array, a second main word line disposed over the second cell array, and a row decoder block disposed between the first cell array and the second cell array, and configured to include a common signal line that is commonly coupled to the first main word line and the second main word line such that a main word line control signal is simultaneously supplied to the first main word line and the second main word line.

Abstract: A semiconductor device is disclosed, which is configured to perform a test using various conditions during a test mode. The semiconductor device includes a voltage generation circuit configured to output 2n (n is an integer of n?2) bit-line precharge voltages through different power-supply lines, based on a mode control signal, and a sense amplifier configured to receive the bit-line precharge voltages from the voltage generation circuit, and supply the 2n bit-line precharge voltages to corresponding bit lines in units of 2n successive bit-lines within the same cell array.

Abstract: A semiconductor device is disclosed. The semiconductor device includes a first cell array and a second cell array, a first main word line disposed over the first cell array, a second main word line disposed over the second cell array, and a row decoder block disposed between the first cell array and the second cell array, and configured to include a common signal line that is commonly coupled to the first main word line and the second main word line such that a main word line control signal is simultaneously supplied to the first main word line and the second main word line.

Abstract: A semiconductor device is disclosed, which is configured to perform a test using various conditions during a test mode. The semiconductor device includes a voltage generation circuit configured to output 2n (n is an integer of n?2) bit-line precharge voltages through different power-supply lines, based on a mode control signal, and a sense amplifier configured to receive the bit-line precharge voltages from the voltage generation circuit, and supply the 2n bit-line precharge voltages to corresponding bit lines in units of 2n successive bit-lines within the same cell array.

Abstract: Disclosed herein is an air shut-off valve for a fuel cell system that can completely close an air passage (11) communicating with a cathode of a fuel cell stack, even though a butterfly-type valve is employed, upon the halt of operation of the fuel cell system, thereby greatly improving the durability of the fuel cell stack.

Abstract: An interposer for inspecting reliability of a semiconductor chip is disclosed. The interposer for inspection includes: at least one active pad disposed in an active region of a first surface, and including: pads through which data and a control signal for testing an inspection target chip are received (input) and sent (output) during an active mode; and pads for receiving a power-supply voltage needed to operate the inspection target chip and the interposer during the active mode; at least one passive pad disposed in a passive region of the first surface, and including: pads receiving data for testing the inspection target chip during a passive mode, and a power-supply voltage needed to operate the inspection target chip and the interposer during the passive mode; and at least one bump pad disposed over a second surface facing the first surface, and to be coupled to the inspection target chip.

Abstract: A bushing having rotatable inner elements which includes a plurality of housings and a plurality of rubbers and into which a stabilizer bar is inserted to be mounted on a vehicle body, may include an outer housing connected to a lower end of a rod connected to the vehicle body, an outer rubber attached on the inner surface of the outer housing, a first inner housing disposed in the outer rubber, a second inner housing disposed in the first inner housing to be rotated with respect to the first inner housing, an inner rubber disposed in the second inner housing, and being in contact with a surface of the stabilizer bar, and a retainer ring formed in a partially-cut ring shape such that the diameter thereof is increased, disposed between the first and second inner housings, and pressurizing the second inner housing toward the inner rubber.

Abstract: Disclosed herein is an air shut-off valve for a fuel cell system that can completely close an air passage (11) communicating with a cathode of a fuel cell stack, even though a butterfly-type valve is employed, upon the halt of operation of the fuel cell system, thereby greatly improving the durability of the fuel cell stack.

Abstract: A bushing having rotatable inner elements which includes a plurality of housings and a plurality of rubbers and into which a stabilizer bar is inserted to be mounted on a vehicle body, may include an outer housing connected to a lower end of a rod connected to the vehicle body, an outer rubber attached on the inner surface of the outer housing, a first inner housing disposed in the outer rubber, a second inner housing disposed in the first inner housing to be rotated with respect to the first inner housing, an inner rubber disposed in the second inner housing, and being in contact with a surface of the stabilizer bar, and a retainer ring formed in a partially-cut ring shape such that the diameter thereof is increased, disposed between the first and second inner housings, and pressurizing the second inner housing toward the inner rubber.

Abstract: An interposer for inspecting reliability of a semiconductor chip is disclosed. The interposer for inspection includes: at least one active pad disposed in an active region of a first surface, and including: pads through which data and a control signal for testing an inspection target chip are received (input) and sent (output) during an active mode; and pads for receiving a power-supply voltage needed to operate the inspection target chip and the interposer during the active mode; at least one passive pad disposed in a passive region of the first surface, and including: pads receiving data for testing the inspection target chip during a passive mode, and a power-supply voltage needed to operate the inspection target chip and the interposer during the passive mode; and at least one bump pad disposed over a second surface facing the first surface, and to be coupled to the inspection target chip.

Abstract: A multi-view device for use in conjunction with a display apparatus is provided. The device includes: a lens unit which operates to selectively transmit or block light; a communication unit which communicates with the display apparatus which is displaying a content image; and a controller which receives a beacon signal in synchronization with a display period of the content image from the display apparatus via the communication unit, controls an operation of the lens unit based on the received beacon signal, and changes a reception frequency of the beacon signal in accordance with a running time of the content image displayed on the display apparatus.