Abstract: A supply voltage removal detecting circuit, a display device and method for removing a latent image when a supply voltage is disconnected, in which the supply voltage removal detecting circuit includes a voltage controller, a detection signal generator, and an output unit. The voltage controller controls voltages such that when a first supply voltage and a second supply voltage stay at a first level, the voltage at a first node is greater than the voltage at a second node, and when the first supply voltage or the second supply voltage becomes a second level, the voltage at the second node stays at a specific level, and the voltage at the first node is less than the specific level. The detection signal generator generates a detection signal by comparing the voltage at the first node with the voltage at the second node.

Abstract: A synchronization circuit includes a first level-shifting unit receiving an input reference signal having a first swing voltage and generating a first level change signal having a second swing voltage and a second level change signal having a third swing voltage, and a synchronization unit generating first and second output signals by synchronizing the first level change signal with the second level change signal.

Abstract: A supply voltage removal detecting circuit, a display device and method for removing a latent image when a supply voltage is disconnected, in which the supply voltage removal detecting circuit includes a voltage controller, a detection signal generator, and an output unit. The voltage controller controls voltages such that when a first supply voltage and a second supply voltage stay at a first level, the voltage at a first node is greater than the voltage at a second node, and when the first supply voltage or the second supply voltage becomes a second level, the voltage at the second node stays at a specific level, and the voltage at the first node is less than the specific level. The detection signal generator generates a detection signal by comparing the voltage at the first node with the voltage at the second node.

Abstract: A liquid crystal display (LCD) that includes a plurality of pixels, a switch unit, and a gate line driving unit. Each of the pixels includes a liquid crystal capacitor having a pixel electrode and a common electrode, and the pixels are located at intersections of a plurality of gate lines and a plurality of source lines. The switch unit applies source line driving voltages having levels opposite to a common voltage applied to the common electrode, to the source lines. The gate line driving unit sequentially outputs via gate lines gate line driving voltages to control the source line driving voltages to be applied to the pixel electrodes of the pixels. The common voltage transits from a first level to a second level or vice versa at the boundary between a first half frame and a second half frame. At the first half frame, the switch unit applies the source line driving voltages to only odd-numbered source lines.

Abstract: An integrated circuit device includes an amplifier circuit that generates an output voltage. A bias control circuit is configured to generate a bias control voltage or the output voltage at an output thereof based on a state of a control signal. An output stage driver circuit that is responsive to the voltage generated at the output of the bias control circuit.

Abstract: A level shifter includes a level shifting circuit shifting a level of a boosted signal input through an input terminal connected to the level shifter and outputting the boosted signal at a new level, and a boosting circuit receiving an input signal, boosting a voltage of the input signal to generate the boosted signal, and providing the boosted signal to the input terminal.

Abstract: Embodiments of the present invention provide a method for driving a liquid crystal display (LCD) device using gray-scale voltages whose dynamic ranges are different from each other depending on pixel color. The gray-scale voltages are output to a source line driver. Embodiments of the invention also provide a gray-scale voltage generation circuit coupled to a LCD source line driver. The disclosed method and circuit reduce coupling phenomena in source lines to substantially remove artifacts such as stripes or flicker in an LCD device.

Abstract: A method of driving a display panel that comprises a plurality of source lines, a plurality of gate lines, a plurality of cell capacitors each of which includes a pixel electrode and a common electrode, and a plurality of cell transistors that transmit a data voltage applied to the source lines to the pixel electrodes in response to a gate driving voltage applied to the gate lines. A common voltage, which is toggled from a first reference voltage to a second reference voltage, or vice versa, is applied to the common electrode. When the data voltage is applied to an odd-numbered source line, the neighboring even-numbered source line enters a floating state. When the data voltage is applied to an even-numbered source line, the neighboring odd-numbered source line enters a floating state.

Abstract: A display driving circuit comprises a driving frequency output device which outputs a frame frequency of a vertical synchronization signal, a frequency of a horizontal synchronization signal, and a frequency of a PCLK signal in response to an oscillator clock signal, and a clock generator which generates a system clock signal based on the frame frequency of the vertical synchronization signal, the frequency of the horizontal synchronization signal, and the frequency of the PCLK signal, and outputs the system clock signal.

Abstract: A charge pump circuit of a liquid crystal display driver integrated circuit (LDI) is provided, which can reduce unnecessary current consumption when a load of an output node varies is provided, where, in a gradient mode of a display-on mode, in which an output node of the charge pump circuit has a maximum load, the current driving capability of a driver in the charge pump circuit is increased, and where, in a binary mode, in which the output node of the charge pump circuit has a smaller load than in the gradient mode, the current driving capability of the driver is lower, to prevent unnecessary current consumption caused by too large driving transfer transistors in the driver and to maintain boost efficiency at a proper level.

Abstract: A source driver and a source line driving method capable of removing the offset effect of an amplifier for every two frames. The source driver includes an amplification unit, an input controller and an output controller. The amplification unit includes a positive amplifier outputting an output voltage having a positive deviation relative to an input voltage applied thereto and a negative amplifier outputting an output voltage having a negative deviation relative to an input voltage applied thereto. The input controller transfers a first gray-level voltage corresponding to a driving voltage of a first source line and a second gray-level voltage corresponding to a driving voltage of a second source line adjacent to the first source line to the amplification unit in response to input positive control signals or input negative control signals.

Abstract: A supply voltage removal detecting circuit, a display device and method for removing a latent image when a supply voltage is disconnected, in which the supply voltage removal detecting circuit includes a voltage controller, a detection signal generator, and an output unit. The voltage controller controls voltages such that when a first supply voltage and a second supply voltage stay at a first level, the voltage at a first node is greater than the voltage at a second node, and when the first supply voltage or the second supply voltage becomes a second level, the voltage at the second node stays at a specific level, and the voltage at the first node is less than the specific level. The detection signal generator generates a detection signal by comparing the voltage at the first node with the voltage at the second node.

Abstract: A method is provided for driving a liquid crystal display having a multi-channel single-amplifier structure, where the number of times of coupling according to video signals transmitted to adjacent source lines while the source lines are floated is 3 and it is equal for the respective source lines for 6 frames, noise aspects of the respective source lines are similarly repeated for every 6 frames, kick-back noise compensation is uniformly applied to the source lines S_r, S_g and S_b with noise of the 6 frames averaged, and charge sharing time of parasitic capacitors between the source lines and charge sharing time of capacitors of liquid crystal cells become similar to each other.

Abstract: There is provided a bit refresh circuit and method of checking errors in bit values of a register and refreshing the bit values, and an integrated circuit comprising the bit refresh circuit. The integrated circuit includes a refresh unit checking whether or not the bit values of the register storing data used to control the operations of a logic circuit changes due to external noise. The refresh unit checks bit-by-bit whether or not there are errors in the bit values due to the external noise. If there are errors in the bit values of the register, the data of the associated bit values stored in a memory are refreshed into the register.

Abstract: Synchronization circuits and methods for generating level-shifted signals having different voltages and substantially the same phase irrespective of process parameter variations or applied power supply voltages are provided. A synchronization circuit includes a first level-shifting unit receiving an input reference signal having a first swing voltage and generating a first level change signal having a second swing voltage and a second level change signal having a third swing voltage, and a synchronization unit generating first and second output signals by synchronizing the first level change signal with the second level change signal.

Abstract: Provided is a display panel driving circuit. The display panel driving circuit rearranges and stores image data input of a predetermined number of source lines externally so that data of the same channel neighbor each other, and compares the rearranged data. If the rearranged data are identical, only one buffer is driven, and common data is transferred to a plurality of source lines, outputs the rearranged data according to each channel, sequentially outputs data according to each source line using source drivers of each channel. Thus, when output data neighboring source lines are identical, the current required for the buffer is reduced.

Abstract: Display driver circuits include an output selector circuit having an output port electrically coupled to a plurality of display data lines and a first input port electrically coupled to a first bus. An amplifier control circuit is also provided. This control circuit includes a plurality of amplifiers, which are programmable to have different current sourcing characteristics. The control circuit is configured to drive each of a plurality of signal lines in the first bus with different gray scale voltages provided by the plurality of amplifiers. The output selector also has a second input port configured to receive digital display data. This digital display data is also provided to the amplifier control circuit.

Abstract: Provided is a liquid crystal display panel having gate drivers. The LCD panel includes a gate line shift circuit setting a gate line scanning order such that the gate lines are sequentially scanned in units of n gate lines with k-1 gate lines between each pair of adjacent gate lines in each unit according to an interleaving method in response to a gate line-on signal received from a timing control unit outside the LCD panel, wherein the LCD panel reproduces source data output from a source driver outside the LCD panel in the gate line scanning order set by the gate line shift circuit. The LCD panel inverts the polarity of a common voltage for every unit of n gate lines, instead of every gate line, thereby reducing power consumption. In addition, since every kth gate line is scanned according to the interleaving method, deterioration of image quality such as a flickering phenomenon can be prevented, which is an advantage of a line inversion driving method.

Abstract: There is provided a bit refresh circuit and method of checking errors in bit values of a register and refreshing the bit values, and an integrated circuit comprising the bit refresh circuit. The integrated circuit includes a refresh unit checking whether or not the bit values of the register storing data used to control the operations of a logic circuit changes due to external noise. The refresh unit checks bit-by-bit whether or not there are errors in the bit values due to the external noise. If there are errors in the bit values of the register, the data of the associated bit values stored in a memory are refreshed into the register.

Abstract: A control signal for removal of an afterimage from an active matrix display device is generated after the removal or disconnect of power from the device. A detector circuit receives a first voltage from a first voltage source and a second voltage from a second voltage source, and outputs a detection signal when either one of the first and second voltages drops to a given voltage level. An output circuit which receives the detection signal and outputs the control signal for removal of the afterimage from the active matrix display device.