Abstract: Provided is a relay switch device including a relay housing, a first upper fixing terminal and a second upper fixing terminal arranged side by side over an inside and an outside of the relay housing, a first lower fixing terminal electrically connected to the first upper fixing terminal and arranged under the first upper fixing terminal to be apart a predetermined distance from the first upper fixing terminal, and a second lower fixing terminal electrically connected to the second upper fixing terminal and arranged under the second upper fixing terminal to be apart a predetermined distance from the second upper fixing terminal, and a circuit mode switch module provided to selectively contact the first and second upper fixing terminals or the first and second lower fixing terminals by moving a predetermined distance.

Abstract: The present invention relates to a battery disconnect unit including a fuse connected to a battery pack, the fuse being configured to interrupt overcurrent of the battery pack, at least one sensor configured to measure voltage or current of the battery pack, at least one relay configured to connect or disconnect the battery pack and the load to or from each other based on a value of the voltage or the current measured by the sensor, a housing configured to allow the fuse, the sensor, and the relay to be mounted therein, and a moving plate configured to fix the relay and the sensor to the housing, the position of the moving plate being changeable depending on sizes of the relay and the sensor.

Abstract: An inter-bus bar including a first bus bar including a first body region having a fastening hole formed at one end and a first length adjusting region configured to extend by a predetermined length from the other end, and a second bus bar including a second body region having a fastening hole formed at one end and a second length adjusting region configured to extend by a predetermined length from the other end, the second bus bar being configured to be coupled to or released from the first bus bar, the first length adjusting region and the second length adjusting region forming a connection portion where they are at least partially overlapped, and the first length adjusting region and the second length adjusting region being removably coupled to each other at different relative positions to change the length of the connection portion.

Abstract: A semiconductor device includes a mapping table that stores a corresponding relation between a logical address defined on a basis of regions and a physical address defined on a basis of extents, wherein one or more extents are dynamically allocated to one region.

Abstract: The present invention relates to an apparatus and method for indicating flash memory life. While data is being stored in a flash memory, the number of writes in a plurality of blocks of the flash memory increases. The amount of flash memory life is calculated on the basis of the number of write times in the plurality of blocks. The calculated amount of life can be transmitted to a host. In addition, when the calculated amount of life is greater than a threshold value, a signal providing notice that the life of the flash memory has reached a dangerous level can be output.

Abstract: The present invention relates to a grouping method and device for enhancing redundancy removing performance for a storage unit such as a hard disk, a solid state disk (SSD), etc. The grouping method for enhancing performance of a redundancy removing technology may include: extracting samples from data that is stored in a buffer of a memory and is standing by to be processed; performing remaining calculations on the extracted samples; and grouping samples by connecting them to a bucket corresponding to a resultant value of the remaining calculations.

Abstract: A solve extraction apparatus includes a solvent extraction unit for extracting a first solvent contained in a gel material, wherein the solvent extraction unit is divided by at least one partition wall, includes multiple extraction baths each accommodating a second solvent, the first solvent contained in the gel material being extracted by the second solvent while moving in the multiple extraction baths.

Abstract: A semiconductor device includes a mapping table that stores a corresponding relation between a logical address defined on a basis of regions and a physical address defined on a basis of extents, wherein one or more extents are dynamically allocated to one region.

Abstract: The present invention relates to a method and device for storing data in a flash memory using address mapping for supporting various block sizes. A storage device determines the size of a block that a host system uses on the basis of the size of data that the host system requests and uses the determined block size as a mapping unit. Additionally, the storage device divides a logical address space into at least one area, and maps an address using the minimum units of different mappings in each divided area.

Abstract: The present invention relates to a storage device that uses a flash memory that performs power loss recovery, and to a method of power loss recovery by using the storage device using the flash memory. The storage device stores change information on metadata in physical pages in which one or more logical pages are compressed and stored. The change information on the metadata is information representing how the metadata is changed in association with data in the one or more logical pages. The storage device may synchronize the metadata in the flash memory and recover the metadata by applying the change information on the metadata to the synchronized metadata when a power supply is disrupted.

Abstract: The present invention relates to an apparatus and method for controlling multi-way NAND flashes using input-output pins. The apparatus for controlling multi-way NAND flashes includes: a NAND flash monitor for confirming each state of a plurality of NAND flashes by using a read status command which checks whether an inner operation of the NAND flash is performed normally; and a scheduler for determining the order in which each of the NAND flashes occupies an input-output bus.

Abstract: The present invention relates to an apparatus and method for indicating flash memory life. While data is being stored in a flash memory, the number of writes in a plurality of blocks of the flash memory increases. The amount of flash memory life is calculated on the basis of the number of write times in the plurality of blocks. The calculated amount of life can be transmitted to a host. In addition, when the calculated amount of life is greater than a threshold value, a signal providing notice that the life of the flash memory has reached a dangerous level can be output.

Abstract: The present invention relates to a grouping method and device for enhancing redundancy removing performance for a storage unit such as a hard disk, a solid state disk (SSD), etc. The grouping method for enhancing performance of a redundancy removing technology may include: extracting samples from data that is stored in a buffer of a memory and is standing by to be processed; performing remaining calculations on the extracted samples; and grouping samples by connecting them to a bucket corresponding to a resultant value of the remaining calculations.

Abstract: The present invention relates to a storage device that uses a flash memory that performs power loss recovery, and to a method of power loss recovery by using the storage device using the flash memory. The storage device stores change information on metadata in physical pages in which one or more logical pages are compressed and stored. The change information on the metadata is information representing how the metadata is changed in association with data in the one or more logical pages. The storage device may synchronize the metadata in the flash memory and recover the metadata by applying the change information on the metadata to the synchronized metadata when a power supply is disrupted.

Abstract: The present invention relates to a method and device for storing data in a flash memory using address mapping for supporting various block sizes. A storage device determines the size of a block that a host system uses on the basis of the size of data that the host system requests and uses the determined block size as a mapping unit. Additionally, the storage device divides a logical address space into at least one area, and maps an address using the minimum units of different mappings in each divided area.