Patents by Inventor Jaehyuk JU

Jaehyuk JU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240103809
    Abstract: Provided is a computation method of a memory processor configured to perform an operation between a first vector including first elements and a second vector including second elements, the first elements including respective first bits and the second elements including respective second bits, the method performed by the memory processor including: applying, to single-bit operation gates, the respective first bits and the respective second bits; obtaining bit operation result sum values for the respective first and second elements based on bit operation results obtained using the single-bit operation gates; and obtaining an operation result of the first vector and the second vector based on the bit operation result sum value.
    Type: Application
    Filed: April 26, 2023
    Publication date: March 28, 2024
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dong-Jin CHANG, Soon-Wan KWON, Seok Ju YUN, Jaehyuk LEE, Sungmeen MYUNG, Daekun YOON
  • Publication number: 20240094988
    Abstract: A multi-bit accumulator including a plurality of 1-bit Wallace trees configured to perform an add operation on single-bit input data, a plurality of tristate buffers configured to output a result of the add operation of the 1-bit Wallace trees, according to an enable signal, and a shift-adder configured to perform an accumulation operation on the result of the add operation of the plurality of 1-bit Wallace trees by a shift operation based on a clock signal.
    Type: Application
    Filed: March 6, 2023
    Publication date: March 21, 2024
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dong-Jin CHANG, Sungmeen MYUNG, Jaehyuk LEE, Daekun YOON, Seok Ju YUN
  • Publication number: 20240086153
    Abstract: A multi-bit accumulator includes 1-bit Wallace trees each configured to perform an add operation on single-bit input data, tristate logic circuits each configured to output a result of the add operation of the 1-bit Wallace trees according to an enable signal provided to the tristate logic circuits, and a shift-adder configured to perform an accumulation operation on the result of the add operation of the 1-bit Wallace trees by a shift operation based on a clock signal.
    Type: Application
    Filed: September 14, 2023
    Publication date: March 14, 2024
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sungmeen MYUNG, Dong-Jin CHANG, Jaehyuk LEE, Daekun YOON, Seok Ju YUN
  • Publication number: 20240071548
    Abstract: A method and memory device with in-memory computing defection detection is disclosed. A memory device includes a memory including banks, wherein each bank includes a respective plurality of bit-cells, an in-memory computation (IMC) operator configured to perform an IMC operation between first data while the first data is in the bit-cells of the memory and second data received as input to the memory device, wherein the banks share the operator, and wherein the memory device is configured to: generate a first test pattern that is stored in the memory and generate a second test pattern applied to the IMC operator, and based thereon determine whether a defect has occurred in either the memory or the operator, and perform a repair based on the determination that a defect has occurred.
    Type: Application
    Filed: December 29, 2022
    Publication date: February 29, 2024
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sungmeen MYUNG, Seok Ju YUN, Jaehyuk LEE, Seungchul JUNG
  • Publication number: 20240069867
    Abstract: An apparatus and method with in-memory computing (IMC) are provided. An in-memory computing (IMC) circuit includes a plurality of memory banks, each memory bank including a bit cell configured to store a weight value and an operator configured to receive an input value, the operator being connected to the bit cell such that the operator upon receiving the input value outputs a logic operation result between the input value and the weight value, and a logic gate configured to receive the logic operation result of each of the memory banks.
    Type: Application
    Filed: July 12, 2023
    Publication date: February 29, 2024
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Seok Ju YUN, Jaehyuk LEE, Seungchul JUNG, Soon-Wan KWON, Sungmeen MYUNG, Daekun YOON, Dong-Jin CHANG
  • Patent number: 9981387
    Abstract: Provided is a robot control system and a method thereof. The robot control system includes: a mobile robot comprising at least one camera; and a controller, wherein the controller is configured to transmit, to the mobile robot, a signal for adjusting a resolution of a next image to be transmitted from the at least one camera to the controller, based on a data transmission rate of a current image captured by the at least one camera and output to the controller, and wherein the mobile robot is configured to adjust the resolution of the next image, based on the signal for adjusting the resolution of the next image.
    Type: Grant
    Filed: July 6, 2015
    Date of Patent: May 29, 2018
    Assignee: Hanwha Techwin Co., Ltd.
    Inventors: Jaehyuk Ju, Jihyuk Song
  • Publication number: 20160008984
    Abstract: Provided is a robot control system and a method thereof. The robot control system includes: a mobile robot comprising at least one camera; and a controller, wherein the controller is configured to transmit, to the mobile robot, a signal for adjusting a resolution of a next image to be transmitted from the at least one camera to the controller, based on a data transmission rate of a current image captured by the at least one camera and output to the controller, and wherein the mobile robot is configured to adjust the resolution of the next image, based on the signal for adjusting the resolution of the next image.
    Type: Application
    Filed: July 6, 2015
    Publication date: January 14, 2016
    Applicant: Hanwha Techwin Co., Ltd.
    Inventors: Jaehyuk JU, Jihyuk SONG