Abstract: A semiconductor device includes a substrate that includes a first region and a second region that surrounds the first region, an epitaxial layer disposed in the first and second regions, where the epitaxial layer has a first conductivity type, a buried layer disposed below the epitaxial layer, where the buried layer has a second conductivity type that differs from the first conductivity type, a first high-concentration impurity region within the epitaxial layer in the first region, where the first high-concentration impurity region overlaps a top surface of the epitaxial layer and has the first conductivity type, a second high-concentration impurity region within the epitaxial layer in the first region, where the second high-concentration impurity region overlaps the top surface of the epitaxial layer and has the second conductivity type, and a device isolation film disposed on the epitaxial layer between the first and second high-concentration impurity regions.

Abstract: Provided is a separate type bottle top filter device which includes: a first coupling body in which an internal space receiving a sample is provided therein, and a discharge port through which the sample is discharged is formed; a second coupling body removably coupled to a lower portion of the first coupling body, and having a discharge member for discharging the sample discharged through the first discharge port to one side; and a membrane filter installed between the first and second coupling bodies to filter a target substance included in the sample discharged by the discharge member.

Abstract: A secondary battery includes: an electrode assembly including a first electrode plate, a second electrode plate, and a separator; a case accommodating the electrode assembly and having an opening; a cap plate coupled to and sealing the opening in the case; a first terminal plate on the cap plate and electrically connected to the first electrode plate; and a first current collector plate between the first terminal plate and the electrode assembly to electrically connect the first terminal plate to the electrode assembly. The first current collector plate has a first protrusion that passes through the cap plate and is connected to the first terminal plate.

Abstract: A memory system may include a memory device including a plurality of memory areas each configured by a plurality of memory blocks; and a memory controller configured to generate zones each including at least one memory block selected from at least one of the memory areas included in the memory device, manage configuration information for each generated zone, sequentially store data from a first storage location of an open zone among the generated zones during a write operation on the open zone according to an external request, and determine a number of active target memory areas associated with the open zone on a basis of configuration information of the open zone.

Abstract: A memory system may include a memory device including a plurality of memory areas each configured by a plurality of memory blocks; and a memory controller configured to generate zones each including at least one memory block selected from at least one of the memory areas included in the memory device, manage configuration information for each generated zone, sequentially store data from a first storage location of an open zone among the generated zones during a write operation on the open zone according to an external request, and determine a number of active target memory areas associated with the open zone on a basis of configuration information of the open zone.

Abstract: A semiconductor device includes a substrate, a gate electrode disposed on an upper surface of the substrate, a source region disposed on a first side of the gate electrode, a drain region disposed on a second side of the gate electrode opposite to the first side of the gate electrode in a horizontal direction, and an insulating structure at least partially buried inside the substrate on the substrate. The insulating structure includes a first portion disposed between the substrate and the gate electrode, and a second portion in contact with the drain region. An uppermost surface of the second portion of the insulating structure is lower than an uppermost surface of the first portion of the insulating structure. At least a part of the gate electrode is disposed on the uppermost surface of the second portion of the insulating structure.

Abstract: The present technology relates to an electronic device. According to the present technology, a memory controller may include a latency monitor and an operation controller. The latency monitor may count an over-latency count value representing a number of over-latencies exceeding a reference value among latencies for requests from a host during each of a plurality of periods, calculate gaps which are difference values between the over-latency count values of the plurality of periods, and generate latency information including the over-latency count values and the gaps. The operation controller may determine, based on the latency info oration, whether each gap between at least two target periods among the plurality of periods exceeds a threshold value, and delay a response to the requests according to a determination result.

Abstract: A data storage device may include a plurality of system resources, a buffer memory device and a memory controller. The buffer memory device may include a buffer memory allotted to the system resources. The memory controller may allocate the buffer memory based on performance requirements that are set in each of the system resources.

Abstract: Disclosed is a mobility service platform including: a public transportation inquiry server for collecting traveling information for a public transportation; and a mobility service server for providing a mobility service for transporting a user via a rideshare vehicle traveling on a route based on a request from the user, and for providing a transfer service between the rideshare vehicle and the public transportation. The mobility service server may receive a starting location and a destination from a user terminal for providing the mobility service, receive the traveling information from the public transportation inquiry server, generate, based on the starting location, the destination, and the traveling information, at least one recommended route among a plurality of routes that are traveled by a combination of the rideshare vehicle and the public transportation, and reserve the mobility service based on the at least one recommended route.

Abstract: The present technology relates to an electronic device. According to the present technology, a memory controller may include a latency monitor and an operation controller. The latency monitor may count an over-latency count value representing a number of over-latencies exceeding a reference value among latencies for requests from a host during each of a plurality of periods, calculate gaps which are difference values between the over-latency count values of the plurality of periods, and generate latency information including the over-latency count values and the gaps. The operation controller may determine, based on the latency info oration, whether each gap between at least two target periods among the plurality of periods exceeds a threshold value, and delay a response to the requests according to a determination result.

Abstract: A memory controller that controls a memory device including a plurality of memory blocks allocated to a plurality of zones for storing data is provided. The memory controller comprises a plurality of processing cores controlling data operations in the plurality of zones in the memory device; and an external interface unit in communication with an external device and configured to receive, from the external device, a write request requesting to perform a write operation on a first zone in the memory device, the external interface unit configured to identify a first processing core for controlling the first zone and determine a second core to perform the write operation based on a number of open zones controlled by the first core and having an open state indicating a capability to execute a program operation.

Abstract: A memory system may include a memory device including a plurality of memory areas each configured by a plurality of memory blocks; and a memory controller configured to generate zones each including at least one memory block selected from at least one of the memory areas included in the memory device, manage configuration information for each generated zone, sequentially store data from a first storage location of an open zone among the generated zones during a write operation on the open zone according to an external request, and determine a number of active target memory areas associated with the open zone on a basis of configuration information of the open zone.

Abstract: A mandrel for manufacturing an electrode assembly includes a first mandrel member having a semicircular cross-section and a predetermined length, and a second mandrel member configured to define a cylindrical shape of the mandrel by being coupled to the first mandrel member while facing the first mandrel member. A concave-convex part is provided on joint surfaces of the first and second mandrel members. The concave-convex part includes a protrusion and a groove formed in a longitudinal direction so as to engage with each other.

Abstract: A semiconductor device includes a semiconductor substrate including an active region defined in a well impurity layer having a first conductivity type, a gate electrode on the active region, and a gate insulating layer between the gate electrode and the active region. The active region includes a source region and a drain region at sides of the gate electrode, the source region and the drain region having a second conductivity type, a channel region between the source and drain regions, the channel region having the first conductivity type, a first halo region in contact with the source region and a second halo region in contact with the drain region, the first halo region and the second halo region having the first conductivity type, and a slit well region between the first and second halo regions, the slit well region having the first conductivity type.

Abstract: A memory controller that controls a memory device including a plurality of memory blocks allocated to a plurality of zones for storing data is provided. The memory controller comprises a plurality of processing cores controlling data operations in the plurality of zones in the memory device; and an external interface unit in communication with an external device and configured to receive, from the external device, a write request requesting to perform a write operation on a first zone in the memory device, the external interface unit configured to identify a first processing core for controlling the first zone and determine a second core to perform the write operation based on a number of open zones controlled by the first core and having an open state indicating a capability to execute a program operation.

Abstract: A semiconductor device includes a substrate, a gate electrode disposed on an upper surface of the substrate, a source region disposed on a first side of the gate electrode, a drain region disposed on a second side of the gate electrode opposite to the first side of the gate electrode in a horizontal direction, and an insulating structure at least partially buried inside the substrate on the substrate. The insulating structure includes a first portion disposed between the substrate and the gate electrode, and a second portion in contact with the drain region. An uppermost surface of the second portion of the insulating structure is lower than an uppermost surface of the first portion of the insulating structure. At least a part of the gate electrode is disposed on the uppermost surface of the second portion of the insulating structure.

Abstract: The present invention relates to an ultraviolet curable and infrared permeable ink composition for an inkjet, having enhanced high temperature resistance, which exhibits constant infrared transmissivity, surface hardness, and the like by preventing the discoloration and the deformation thereof even if a high temperature-heat treatment is performed during curing, drying, and the like.

Abstract: The present invention relates to a method for printing touch panel cover glass and a touch panel cover glass manufactured by using the same, the method comprising the steps of: a) inkjet-printing both black ink for a bezel and infrared-transmissive ink on a glass by using two or more inkjet heads; and b) forming a bezel layer and an infrared-transmissive layer by curing the substrate, wherein a gap between the inkjet-printed black ink for a bezel and infrared-transmissive ink printed in the step a) is 1 ?m to 500 ?m.

Abstract: The present invention relates to a method for forming a bezel pattern using inkjet printing, and according to the present invention, there is an advantage in that it is possible to form a bezel pattern which is smooth without a curing shrinkage when the bezel pattern is formed and has excellent adhesion strength to a base material, and accordingly it is possible to provide a bezel pattern which has excellent performance, durability, and chemical resistance and a display substrate including the same.

Abstract: A waveguide having a light-shielding film formed on a cut surface of an edge side of the planar waveguide, the light-shielding film having a thickness of 2 to 10 ?m and an optical density (OD) of 0.7 to 1.0 based on a light-shielding film thickness of 1.0 ?m, and a method for manufacturing the same.