Abstract: A method of manufacturing an extreme ultraviolet (EUV) mask includes forming a first multi-layered thin film over a quartz substrate, forming a structure pattern over the first multi-layered thin film, and forming a second multi-layered thin film over the structure pattern and the first multi-layered thin film. The second multi-layered thin film is formed so that a periodicity of the second multi-layered thin film formed over the structure pattern is different from a periodicity of the second multi-layered thin film formed over the first multi-layered thin film.

Abstract: An extreme ultraviolet (EUV) mask includes a quartz substrate including an absorption region and a reflection region, first and second multi-layered thin films formed on the quartz substrate, and a structure pattern disposed between the first and second multi-layered thin films.

Abstract: A semiconductor device fabrication method is disclosed. The method includes obtaining an inverse layout of an original circuit layout, reducing the inverse layout in size, thereby obtaining a reduced layout, obtaining a dummy pattern layout having an outline identical to an outline of the reduced layout and a given line width such that the dummy pattern layout is self-assembled to the circuit layout, and transferring the self-aligned or self-assembled dummy pattern layout and circuit layout to a semiconductor substrate.

Abstract: A method for manufacturing a semiconductor device includes forming a hard mask pattern and a spacer at both sides of the hard mask pattern. The method also includes forming a spacer pattern, so that the spacer remains in one direction to form a spacer pattern, forming a photoresist pattern having a pad type overlapping a side of the spacer pattern, and etching an underlying layer, with the photoresist pattern and the spacer pattern as a mask, to form an isolated pattern. The method improves resolution and process margins to obtain a highly-integrated transistor.

Abstract: Disclosed herein is a method for forming a semiconductor device that stacks an etched layer and a first hard mask layer on a semiconductor substrate, patterns the first hard mask layer in a high density region and a low density region, using a first exposure mask, forms a first spacer on a sidewall of the first hard mask layer in the high density region, forms a second spacer on a sidewall of the first hard mask layer in the low density region at the same time, etches an end with the first spacer connected thereto using a second exposure mask to thereby form a first spacer pattern, forms a planarized second hard mask layer that exposes the first spacer pattern and the second spacer, removes the first spacer pattern and the second spacer such that the second hard mask layer is left, and etches the etched layer using the second hard mask layer as an mask. This method makes it possible to easily form a micro pattern in the high density region and the low density region.

Abstract: An exposure mask provides a minute pattern formation which enables the high integration of semiconductor devices by preventing the generation of a scum in a space between a first pattern and a second pattern. The exposure mask includes a first pattern and a second pattern adjacent to the first pattern. A space is formed between the first pattern and the second pattern. The first pattern and the second pattern may each include a square wave shaped edge that is adjacent to the space. The square wave shaped edge includes a plurality of concave portions and convex portions.

Abstract: In a method for fabricating a fine pattern, a target layer to be patterned is formed on a semiconductor substrate. A sacrificial pattern is formed on the target layer. The sacrificial pattern includes first sacrificial patterns arranged at a first spacing, and second and third sacrificial patterns arranged in pairs at a second spacing less than the first spacing. A spacer having a first portion and a second portion is formed. The first portion is attached to sidewalls of the first sacrificial patterns, and the second portion is attached on both facing sides of the second and third sacrificial patterns to fill a gap defined by the second spacing. The second portion has a critical dimension greater than the first portion. The sacrificial pattern is selectively removed.

Abstract: An extreme ultraviolet (EUV) mask includes a quartz substrate including an absorption region and a reflection region, first and second multi-layered thin films formed on the quartz substrate, and a structure pattern disposed between the first and second multi-layered thin films.

Abstract: A mask is formed with first contact patterns in first columns and second contact patterns in second columns. Each first column is formed between adjacent second columns. The first contact pattern in each first column is aligned with the first contact patterns in the other first columns. The second contact pattern in each second column is aligned with the second contact patterns in the other second columns. The first contact patterns in each first column are not aligned with the second contact patterns in the second columns. Patterning is performed using the mask to secure the size of the contact patterns and to improve a process margin when manufacturing semiconductor devices.

Abstract: A photo mask and the method for fabricating the same wherein the photo mask includes: a mask substrate; a frame pattern formed along a contour of a target pattern to be transcribed to a wafer on the mask substrate, which includes a first pattern arranged in the aperture orientation of an illuminating system and a second pattern arranged perpendicularly to the aperture orientation of the illuminating system; and a third pattern disposed in a inner region of the frame pattern, which has the same transmittance as the second pattern.

Abstract: A photo mask includes a dot pattern formed between a line pattern and an island pattern. Methods of making a semiconductor device employing such a photo mask improves yield and productivity of the device.

Abstract: A semiconductor device fabrication method is disclosed. The method includes obtaining an inverse layout of an original circuit layout, reducing the inverse layout in size, thereby obtaining a reduced layout, obtaining a dummy pattern layout having an outline identical to an outline of the reduced layout and a given line width such that the dummy pattern layout is self-assembled to the circuit layout, and transferring the self-aligned or self-assembled dummy pattern layout and circuit layout to a semiconductor substrate.

Abstract: Disclosed herein are an exposure mask and a method of making a semiconductor device using the mask. The exposure mask includes a transparent substrate; and a light blocking pattern having first and second patterns, and an assist feature disposed between the first and second patterns and including a dot pattern arranged into two rows deviated from each other. The exposure make can improve the depth of focus margin to allow for the high integration of a semiconductor device.

Abstract: A method of forming a line pattern array comprises the steps of setting a layout which includes first continuous line patterns arranged to have a first line width and a second continuous line pattern arranged to have a second line width larger than the first line width and positioned outside the first continuous line patterns; transferring the layout on a wafer; and inducing light scattering by changing an outermost pattern of the first continuous line patterns, which is most closely adjacent to the second continuous line patterns, into a plurality of dotted line patterns, wherein the plurality of the dotted patterns are arranged in a line form in order that a line pattern, which is different from the first continuous line patterns in line width, is formed based on a size of the dotted patterns.

Abstract: A photomask comprises a transparent substrate, a peripheral pattern formed on the transparent substrate along a contour of a target pattern to be transferred onto a wafer, and an assist pattern disposed inside the peripheral pattern. The photomask has the assist pattern formed inside the target pattern, thereby preventing the assist pattern from being undesirably on the target pattern. In addition, the method can fabricate the assist pattern in a complicated structure which cannot be realized by the conventional technique, so that it can be applied to any kinds of patterns.

Abstract: A lithography method for suppressing resist scum includes the steps of designing an original layout with line patterns and pad patterns, extracting a pad pattern layout from the original, layout, obtaining a first reduction layout which is reduced by a first reduction width relative to the pad pattern layout, obtaining a second reduction layout which is reduced by a second reduction width larger than the first reduction width relative to the pad pattern layout, obtaining an assist pattern layout which is self-aligned to the pad pattern layout by deducting the second reduction layout from the first reduction layout, generating assist patterns in the original layout by deducting the assist pattern layout from the original layout, and projecting the layout including the assist patterns on a semiconductor substrate by an exposure process.

Abstract: A semiconductor device fabrication method is disclosed. The method includes obtaining an inverse layout of an original circuit layout, reducing the inverse layout in size, thereby obtaining a reduced layout, obtaining a dummy pattern layout having an outline identical to an outline of the reduced layout and a given line width such that the dummy pattern layout is self-assembled to the circuit layout, and transferring the self-aligned or self-assembled dummy pattern layout and circuit layout to a semiconductor substrate.

Abstract: Disclosed herein is a method for forming a semiconductor device that stacks an etched layer and a first hard mask layer on a semiconductor substrate, patterns the first hard mask layer in a high density region and a low density region, using a first exposure mask, forms a first spacer on a sidewall of the first hard mask layer in the high density region, forms a second spacer on a sidewall of the first hard mask layer in the low density region at the same time, etches an end with the first spacer connected thereto using a second exposure mask to thereby form a first spacer pattern, forms a planarized second hard mask layer that exposes the first spacer pattern and the second spacer, removes the first spacer pattern and the second spacer such that the second hard mask layer is left, and etches the etched layer using the second hard mask layer as an mask. This method makes it possible to easily form a micro pattern in the high density region and the low density region.

Abstract: Disclosed herein are an exposure mask and a method for manufacturing a semiconductor device using the same. The exposure mask comprises a first transparent pattern having a rectangular shape for forming an expected contact hole region, and a second transparent pattern formed at both long sides of the first transparent pattern, thereby maintaining a process margin and obtaining a contact hole with reduced exposure energy.

Abstract: Disclosed herein are an exposure mask and a method of making a semiconductor device using the mask. The exposure mask includes a transparent substrate; and a light blocking pattern having first and second patterns, and an assist feature disposed between the first and second patterns and including a dot pattern arranged into two rows deviated from each other. The exposure make can improve the depth of focus margin to allow for the high integration of a semiconductor device.