Patents by Inventor Jae Jin

Jae Jin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250232724
    Abstract: According to embodiments of the disclosure, a pixel includes a first transistor connected between a first power line and a second power line, and having a gate electrode connected to a first node, a light emitting element connected between the first power line and the second power line, an initialization transistor connected between a third power line and an anode electrode of the light emitting element, and having a gate electrode connected to a first scan line, and a boosting capacitor connected between the first scan line and the anode electrode of the light emitting element.
    Type: Application
    Filed: October 15, 2024
    Publication date: July 17, 2025
    Inventors: Sung Min SON, Jae Jin SONG, Soo Jo OCK
  • Publication number: 20250205260
    Abstract: Disclosed herein are azidodeoxy- and aminodeoxy trehalose (TreAz and TreNH2) compounds that inhibit Mycobacterium tuberculosis (an etiological agent of TB) biofilm (an in vitro model of intent TB infection) formation via blocking of the adaptive strategy used by M. tuberculosis form biofilm, termed trehalose catalytic shift. Prior to our work, such compounds were never tested for inhibition of mycobacterial biofilm formation. Our work defined this class of compounds' mechanism of action and showed for the first time that they sensitize drug-tolerant mycobacteria to existing clinically used antibiotics. The disclosed compounds are potential drugs for adjunctive treatment of TB and related mycobacterial diseases.
    Type: Application
    Filed: March 21, 2023
    Publication date: June 26, 2025
    Applicants: UNIVERSITY OF SOUTHERN CALIFORNIA, CENTRAL MICHIGAN UNIVERSITY, UNIVERSITY OF MAINE SYSTEM BOARD OF TRUSTEES
    Inventors: Hyungjin EOH, Benjamin SWARTS, Peter WOODRUFF, Jae Jin LEE
  • Publication number: 20250200346
    Abstract: Disclosed is a data processing device of the spiking neural network, which includes a discretizer that receives time-series data, discretizes the time-series data based on sampling, and outputs sampled time-series data, and a control unit that receives the sampled time-series data, extracts a voltage feature and a time feature from the sampled time-series data, and increases the number of spikes firing in an input neuron each corresponding to the voltage feature and the time feature extracted from a plurality of input neurons including first to n-th input neurons, with respect to the ā€œnā€, which is an arbitrary positive integer.
    Type: Application
    Filed: August 15, 2024
    Publication date: June 19, 2025
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Tae Wook KANG, Sung Eun KIM, Hyuk KIM, Kyung Jin BYUN, Kwang IL OH, Jae-Jin LEE
  • Patent number: 12334165
    Abstract: An aging monitoring circuit of a semiconductor memory device includes a threshold voltage sensing part including an aging monitoring transistor, enabled in response to activation of an aging monitoring signal, and generating a sensing threshold signal, a level of the sensing threshold signal depending on a threshold voltage of the aging monitoring transistor, a reference threshold storage part receiving the sensing threshold signal generated in response to activation of a reference sensing signal and storing a reference threshold voltage, a level of the reference threshold voltage depending on the level of the sensing threshold signal, and a level comparing part enabled in response to the activation of the aging monitoring signal and generating an aging flag signal, a logic state of the aging flag signal depending on a comparison result between the level of the sensing threshold signal and the level of the reference threshold voltage.
    Type: Grant
    Filed: April 11, 2023
    Date of Patent: June 17, 2025
    Assignee: FIDELIX CO., LTD.
    Inventor: Jae Jin Lee
  • Patent number: 12332810
    Abstract: Provided is an electronic device, including a first chiplet including a first bus interface, a first interconnect management module, and a first interconnect module, and a second chiplet connected to the first chiplet through the first interconnect module, wherein, in response to an occurrence of a request transaction associated with the second chiplet, the first interconnect management module stores, in a register, first information associated with the request transaction.
    Type: Grant
    Filed: November 6, 2024
    Date of Patent: June 17, 2025
    Assignee: REBELLIONS INC.
    Inventors: Young-Jae Jin, Miock Chi, Sanggyu Park, Chang-Hyo Yu, Changsoo Ha, Jaewan Bae
  • Publication number: 20250191631
    Abstract: A pumping voltage generating circuit can include a control information generating block receiving a pumping enable signal and a refresh sequential signal and generating driving force control information, the driving force control information controlled so that a number of pulses of the refresh sequential signal falling within a target pulse number range is generated during the generation of pulses of the pumping enable signal which have the pumping reference number, a pumping generation block generating a pumping voltage with a total pumping force, the total pumping force depending on the data value of the driving force control information, and a level detection block detecting a level of the pumping voltage and generating the pumping enable signal, the pumping enable signal activated when the level of the pumping voltage is outside a target level range, and deactivated when the level of the pumping voltage falls within the target level range.
    Type: Application
    Filed: October 31, 2024
    Publication date: June 12, 2025
    Applicant: FIDELIX CO., LTD.
    Inventor: Jae Jin LEE
  • Publication number: 20250182250
    Abstract: An image data obtainment device includes a camera module, a pattern mount part, and a housing in which the camera module is positioned. The camera module generates image data for image restoration training. The pattern mount part may selectively position a dummy pattern on the camera module. The pattern mount part is positioned on the housing.
    Type: Application
    Filed: October 22, 2024
    Publication date: June 5, 2025
    Applicants: Samsung Display Co., LTD., Seoul National University R&DB Foundation
    Inventors: Kyu Su AHN, Jae Jin LEE, Byeong Hyun KO, Chan Woo PARK, Hyun Gyu LEE
  • Publication number: 20250140307
    Abstract: A bit line pre-charge voltage generating circuit in a semiconductor memory device may reduce current consumption. The bit line pre-charge voltage generating circuit includes a reference voltage generating portion that generates a pull-down reference voltage and a pull-up reference voltage; a comparing portion that generates a pull-up comparison signal by comparing the level of the bit line pre-charge voltage with that of the pull-up reference voltage, and generates a pull-down comparison signal by comparing the level of the bit line pre-charge voltage with that of the pull-down reference voltage; a driving portion that includes a pull-up driving element and a pull-down driving element; and an activation overlap reduction portion that generates the pull-up control signal and the pull-down control signal The activation overlap reduction portion can minimize the overlap between the turn-on sections of the pull-up driving element and the pull-down driving element of the driving portion.
    Type: Application
    Filed: July 19, 2024
    Publication date: May 1, 2025
    Applicant: FIDELIX CO., LTD.
    Inventor: Jae Jin LEE
  • Publication number: 20250143158
    Abstract: A light emitting element layer of a display device is disposed on a base layer. A first light emitting part of the light emitting element layer includes first organic patterns emitting light, a charge generation layer is disposed on the first light emitting part, and a second light emitting part is disposed on the charge generation layer. The second light emitting part covers the charge generation layer in a plan view. The second light emitting part includes second organic patterns disposed in a display area and emitting light and dummy patterns disposed in a non-display area.
    Type: Application
    Filed: October 28, 2024
    Publication date: May 1, 2025
    Applicant: Samsung Display Co., LTD.
    Inventors: Jin Yeong KIM, Hye In JEONG, Sung Jin LEE, Jae Jin LEE, Jong Kuk JU
  • Patent number: 12283223
    Abstract: Provided is a gate driver comprising an inverter inverting a start signal to generate an inverted start signal, a first driver including a first stage generating a bias gate signal to initialize a light emitting element of each of pixels in response to the inverted start signal, and a second driver including a second stage generating a write gate signal to apply data voltages to the pixels in response to the start signal. Accordingly, the gate driver may generate a plurality of gate signals using one start signal. In addition, since the gate driver generates a write gate signal and a bias gate signal using one start signal, a bias operation and a light emitting element initialization operation may be performed in a self-scan period without adding the start signal. Further, a size of the gate driver may be reduced, and accordingly, the gate driver may be efficiently disposed.
    Type: Grant
    Filed: March 23, 2023
    Date of Patent: April 22, 2025
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sungmin Son, Jae-Jin Song, Kimyeong Eom, Jungwoo Lee
  • Publication number: 20250123981
    Abstract: Provided is a communication method by which a transmitting device and a receiving device communicate through a request channel and a reply channel, the communication method including: outputting, by the transmitting device, a burden signal including data to the receiving device through the request channel; storing, by the receiving device, the data; providing, by the transmitting signal, a reply request signal indicating whether a reply is required; and performing, by the receiving device, a reply to the stored data through the reply channel according to the reply request signal.
    Type: Application
    Filed: October 11, 2024
    Publication date: April 17, 2025
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Kyuseung HAN, Hyuk KIM, Kyung Jin BYUN, Sukho LEE, Jae-Jin LEE
  • Patent number: 12273433
    Abstract: Provided is a system for time synchronization between a server and an Internet-of-Things (IoT) device. The system may include a server configured to broadcast a time-point synchronization signal including absolute time point information; and an IoT device configured to receive the broadcast time-point synchronization signal and calculate absolute time point information by using the absolute time point information included in the time-point synchronization signal, computation time information according to an internal computation operation, and transmission time information required to receive the time-point synchronization signal.
    Type: Grant
    Filed: September 21, 2022
    Date of Patent: April 8, 2025
    Assignee: SUNG CHANG CO., LTD
    Inventor: Jae Jin Lee
  • Patent number: 12267631
    Abstract: Disclosed is a network-on-chip including a first data converter that receives first image data and second image data from at least one image sensor and encodes one image data among the first image data and the second image data, into first data, based on whether the first image data is identical to the second image data and a second data converter that receives non-image data from at least one non-image sensor and encodes the received non-image data into second data. The network-on-chip outputs the first data and the second data to transmit the first data and the second data to an external server at a burst length.
    Type: Grant
    Filed: August 11, 2021
    Date of Patent: April 1, 2025
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sukho Lee, Sang Pil Kim, Young Hwan Bae, Jae-Jin Lee, Kyuseung Han, Tae Wook Kang, Sung Eun Kim, Hyuk Kim, Kyung Hwan Park, Hyung-Il Park, Kyung Jin Byun, Kwang Il Oh, In Gi Lim
  • Patent number: 12261706
    Abstract: A data transmission/reception device comprises a data bus; a data transmission circuit that recognizes standard data, receives a transmission data, loads a code data into the data bus, and generates a flag signal; and a data reception circuit that receives the flag signal and the code data transmitted through the data bus, and recovers the code data into a reception data according to the activation of the flag signal. According to the data transmission/reception device of the disclosure, current consumption may be reduced during data transmission.
    Type: Grant
    Filed: May 8, 2023
    Date of Patent: March 25, 2025
    Assignee: FIDELIX CO., LTD.
    Inventor: Jae Jin Lee
  • Patent number: 12260901
    Abstract: A signal input buffer includes 1-st and 2-nd buffering blocks; a 1-st input switching block; a 2-nd input switching block; a 1-st output switching block; and a 2-nd output switching block. The signal input buffer buffers a reception signal pair and generates a buffered signal pair, and is capable of operation in a normal mode and a calibration mode, the reception signal pair includes an intrinsic reception signal and a complementary reception signal, the buffered signal pair includes an intrinsic buffered signal and a complementary buffered signal, and the calibration mode includes a 1-st calibration period and a 2-nd calibration period.
    Type: Grant
    Filed: January 20, 2023
    Date of Patent: March 25, 2025
    Assignee: FIDELIX CO., LTD.
    Inventor: Jae Jin Lee
  • Publication number: 20250077467
    Abstract: An electronic device comprising a plurality of chiplets is disclosed. The electronic device comprises a first chiplet that generates a transaction, a second chiplet that receives the transaction, and at least one third chiplet that relays the transaction, wherein the first chiplet determines a route path for the transaction that passes through the at least one third chiplet, and transmits the transaction through the determined route path for the transaction.
    Type: Application
    Filed: August 16, 2024
    Publication date: March 6, 2025
    Inventors: Young-Jae Jin, Chang-Hyo Yu
  • Publication number: 20250077457
    Abstract: The present disclosure relates to a method for communicating between chiplets in a chiplet system. The chiplet system includes a first chiplet and a second chiplet, and the method includes, by the first chiplet, generating a die-to-die interface flit from a first protocol type transaction based on conversion information, by the first chiplet, transmitting the die-to-die interface flit to the second chiplet, and, by the second chiplet, generating a second protocol type transaction from the die-to-die interface flit based on the conversion information.
    Type: Application
    Filed: August 16, 2024
    Publication date: March 6, 2025
    Inventors: Young-Jae Jin, Chang-Hyo Yu
  • Publication number: 20250077468
    Abstract: The present disclosure relates to a method for communicating between chiplets in a chiplet system. The chiplet system includes a first chiplet and a second chiplet, the first chiplet includes a controller including a protocol layer, and the method includes, by the protocol layer of the first chiplet, receiving first data, by the protocol layer of the first chiplet, receiving conversion information from the second chiplet, and, by the protocol layer of the first chiplet, generating second data based on the received first data and conversion information.
    Type: Application
    Filed: August 16, 2024
    Publication date: March 6, 2025
    Inventors: Young-Jae Jin, Chang-Hyo Yu
  • Publication number: 20250070808
    Abstract: Disclosed is a wake-up circuit including a preprocessing unit that generates a first signal by removing noise from an input signal, a comparison unit that generates a second signal based on the first signal and weight data, an output circuit that generates a power signal based on the second signal and an initialization signal, and a micro control unit (MCU) that generates the initialization signal based on a state signal received from the output circuit. The comparison unit includes a spike neuron network structure that generates the second signal by applying the weight data to the first signal. The output circuit supplies power to an external sensor node in response to the power signal.
    Type: Application
    Filed: May 14, 2024
    Publication date: February 27, 2025
    Inventors: Sung Eun KIM, Tae Wook KANG, Hyuk KIM, Young Hwan BAE, Kyung Jin BYUN, Kwang IL OH, Jae-Jin LEE, In San JEON
  • Patent number: 12238437
    Abstract: An image sensing device providing improved image quality includes a pixel array that outputs a pixel signal, a comparator that outputs a comparison result signal by comparing a reference signal and the pixel signal, a counter that outputs a count result signal having m bits by counting the comparison result signal, and an image signal processor that outputs an image signal having n bits by correcting the count result signal, wherein m and n are integers, and m is greater than n.
    Type: Grant
    Filed: August 25, 2022
    Date of Patent: February 25, 2025
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung Yong Kim, Jae Jin Jung