Patents by Inventor Jae-Jin Park

Jae-Jin Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240079630
    Abstract: The present disclosure relates to a secondary battery manufacturing system in which a packaging unit of a secondary battery manufacturing facility are configured to have multiple packaging units, and having a multipackaging unit such that a transfer box in which an electrode assembly is seated is transferred to each of the packaging units by a transfer unit, and including an electrode supply unit having a plurality of stacking devices supplying an electrode assembly in which a plurality of battery cells are stacked, a tab welding unit, at least one packaging unit, at least one temporary buffer, and a transfer unit.
    Type: Application
    Filed: September 1, 2023
    Publication date: March 7, 2024
    Inventors: Yong Uk SHIN, Sang Sik CHO, Dae Woon NAM, Dong Jin PARK, Jae Gyun CHOI, Chi Hong AN
  • Patent number: 11923882
    Abstract: A hybrid communication device, an operation method thereof, and a communication system including the same are provided. The hybrid communication device includes a contact unit that includes an antenna for receiving a first communication signal and an electrode for receiving a second signal, a switch controller that includes a first switch and a second switch and controls the first switch and the second switch based on a change in capacitance of the electrode, and a signal processing unit that receives at least one of the first communication signal and the second communication signal from the contact unit via the first switch and processes the received signal. The first switch is connected to the contact unit, and the signal processing unit is connected to the first switch.
    Type: Grant
    Filed: March 25, 2021
    Date of Patent: March 5, 2024
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Tae Wook Kang, Sung Eun Kim, Hyung-Il Park, Jae-Jin Lee, Hyuk Kim, Kyung Hwan Park, Mi Jeong Park, Kyung Jin Byun, Kwang Il Oh, In Gi Lim
  • Publication number: 20240067808
    Abstract: An aqueous dispersion composition according embodiments of the present invention includes an ethylene-carboxylic acid copolymer, an anti-blocking agent including a polymer wax included in a content of 5 wt % or more based on a weight of the ethylene-carboxylic acid copolymer, and an aqueous dispersion medium. A peak area corresponding to a melting point of 80° C. or less in a differential scanning calorimetry (DSC) graph is 50% or more. Blocking phenomenon is suppressed using the anti-blocking agent while achieving desired heat seal properties.
    Type: Application
    Filed: September 29, 2020
    Publication date: February 29, 2024
    Inventors: Jae Eun Lee, Ji Sun Choi, Doh Yeon Park, Hai Jin Shin
  • Patent number: 11917907
    Abstract: The present disclosure relates to an organic electroluminescent device. The organic electroluminescent device of the present disclosure shows high luminous efficiency and good lifespan by comprising a specific combination of the plural kinds of host compounds and a specific hole transport compound.
    Type: Grant
    Filed: November 22, 2021
    Date of Patent: February 27, 2024
    Assignee: Rohm and Haas Electronic Materials Korea Ltd.
    Inventors: Kyoung-Jin Park, Tae-Jin Lee, Jae-Hoon Shim, Yoo Jin Doh, Hee-Choon Ahn, Young-Kwang Kim, Doo-Hyeon Moon, Jeong-Eun Yang, Su-Hyun Lee, Chi-Sik Kim, Ji-Song Jun
  • Patent number: 11917873
    Abstract: A display device includes a substrate having a pixel area and a peripheral area, a plurality of pixels disposed on the substrate in the pixel area, a plurality of data lines that supply a plurality of data signals to the pixels, a plurality of scan lines that supply a plurality of scan signals to the pixels, a plurality of power supply lines that supply a first voltage to the pixels, and first through third insulating layers. The first insulating layer is disposed on the substrate, the second insulating layer is disposed on the first insulating layer, and the third insulating layer is disposed on the second insulating layer. The scan lines are disposed below the third insulating layer on the substrate in the pixel area, and are disposed on the third insulating layer in the peripheral area.
    Type: Grant
    Filed: December 30, 2020
    Date of Patent: February 27, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Byung Sun Kim, Sun Ja Kwon, Yang Wan Kim, Hyun Ae Park, Su Jin Lee, Jae Yong Lee
  • Patent number: 10726228
    Abstract: A semiconductor device comprising a fingerprint sensor configured to generate first-direction sensing data and second-direction sensing data by sensing a fingerprint image in a first direction and a second direction, respectively, which is perpendicular to the first direction; a differential sensing circuit configured to generate first-direction first differential data and second-direction first differential data by performing a differential operation on the first-direction sensing data and the second-direction sensing data, respectively; and a fingerprint processing circuit configured to generate first-direction second differential data and second-direction second differential data by performing a differential operation on the first-direction first differential data and the second-direction first differential data, respectively, and generate fingerprint data by adding the first-direction second differential data and the second-direction second differential data.
    Type: Grant
    Filed: July 12, 2017
    Date of Patent: July 28, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hee Chang Hwang, Jae Jin Park, Min Chul Lee, Seung Hoon Lee, Dae Young Chung
  • Patent number: 10698013
    Abstract: A lock-in amplifier includes a clock signal generator configured to generate a first demodulation clock signal and a second demodulation clock signal having a phase difference of 90 degrees and a same demodulation frequency; and a detector configured to, based on an input signal, the first demodulation clock signal, and the second demodulation clock signal, provide an offset voltage corresponding to an offset of the lock-in amplifier in a first operation mode, and provide a first output voltage and a second output voltage, each of which correspond to a demodulation frequency component of the input signal in a second operation mode.
    Type: Grant
    Filed: November 23, 2016
    Date of Patent: June 30, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dae-Young Chung, Jae-Jin Park, Dong-Hyuk Lim
  • Patent number: 10686405
    Abstract: A resonator oscillator that may be included in a gas sensing system may include an oscillator that may be electrically connected to an external resonator through a conductive line. The oscillator may generate an oscillating signal having a frequency corresponding to a resonance frequency of the external resonator in an oscillating path. A spurious resonance removal circuit on the oscillating path may remove spurious resonance caused by the conductive line from the oscillating path. A gas sensing system may include the oscillator, a resonator that includes a sensor configured to sense a gas, and a frequency counting logic that receives the oscillating signal and a reference clock signal, performs a counting operation on the oscillating signal according to a logic state of the reference clock signal to generate a counted value, and generate a gas sensing output indicating a sensed gas based on the counted value.
    Type: Grant
    Filed: October 16, 2017
    Date of Patent: June 16, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eun-seok Shin, Se-ra An, Jae-jin Park, Seung-hoon Lee, Do-hyung Kim, Min-young Kang
  • Patent number: 10146985
    Abstract: A sensing read-out circuit includes an amplifier circuit that converts a charge output from a sensing line of a sensor into a first voltage, another amplifier circuit that converts a charge output from another sensing line into a second voltage, another amplifier circuit that generates a first amplified voltage by amplifying a difference between the first voltage and the second voltage, an analog-to-digital converter that converts the first amplified voltage into a digital signal, a first mixer that generates a second mixed signal by mixing the first digital signal and an in-phase clock signal, a second mixer that generates a second mixed signal by mixing the first digital signal and a quadrature-phase clock signal, a first filter that generates an in-phase signal by performing low-pass filtering on the first mixed signal, and a second filter that generates a quadrature-phase signal by performing low-pass filtering on the second mixed signal.
    Type: Grant
    Filed: February 21, 2017
    Date of Patent: December 4, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dae Young Chung, Jae Jin Park, Hee Chang Hwang
  • Publication number: 20180138859
    Abstract: A resonator oscillator that may be included in a gas sensing system may include an oscillator that may be electrically connected to an external resonator through a conductive line. The oscillator may generate an oscillating signal having a frequency corresponding to a resonance frequency of the external resonator in an oscillating path. A spurious resonance removal circuit on the oscillating path may remove spurious resonance caused by the conductive line from the oscillating path. A gas sensing system may include the oscillator, a resonator that includes a sensor configured to sense a gas, and a frequency counting logic that receives the oscillating signal and a reference clock signal, performs a counting operation on the oscillating signal according to a logic state of the reference clock signal to generate a counted value, and generate a gas sensing output indicating a sensed gas based on the counted value.
    Type: Application
    Filed: October 16, 2017
    Publication date: May 17, 2018
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Eun-seok SHIN, Se-ra AN, Jae-jin PARK, Seung-hoon LEE, Do-hyung KIM, Min-young KANG
  • Patent number: 9933799
    Abstract: A voltage regulator includes an error amplifier configured to receive a first voltage through a first node as an operating voltage, to amplify a difference between a reference voltage and a feedback voltage, and to output an amplified voltage; a power transistor connected between a second node through which a second voltage is supplied and an output node of the voltage regulator; and a switch circuit configured to select a level of a gate voltage supplied to a gate of the power transistor and level of a body voltage supplied to a body of the power transistor in response to a first power sequence of the first voltage, a second power sequence of the second voltage, and an operation control signal.
    Type: Grant
    Filed: September 21, 2016
    Date of Patent: April 3, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jun Hyeok Yang, Dae Yong Kim, Sang Ho Kim, Jae Jin Park
  • Patent number: 9893721
    Abstract: An edge detector includes a differential signal generator, a sense amplifier and a latch. The differential signal generator delays an input signal to generate a first differential signal and inverts the input signal to generate a second differential signal. The sense amplifier amplifies a difference between the first differential signal and the second differential signal to generate a first amplification signal and a second amplification signal at a first edge of a test clock signal and resets the first amplification signal and the second amplification signal at a second edge of the test clock signal. The latch generates an edge signal corresponding to edge information of the input signal in response to the first amplification signal and the second amplification signal.
    Type: Grant
    Filed: July 11, 2016
    Date of Patent: February 13, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dong-Seok Lee, Woo-Seok Kim, Jae-Jin Park, Dong-Hyuk Lim, Dae-Young Chung
  • Publication number: 20180039809
    Abstract: A sensing read-out circuit includes an amplifier circuit that converts a charge output from a sensing line of a sensor into a first voltage, another amplifier circuit that converts a charge output from another sensing line into a second voltage, another amplifier circuit that generates a first amplified voltage by amplifying a difference between the first voltage and the second voltage, an analog-to-digital converter that converts the first amplified voltage into a digital signal, a first mixer that generates a second mixed signal by mixing the first digital signal and an in-phase clock signal, a second mixer that generates a second mixed signal by mixing the first digital signal and a quadrature-phase clock signal, a first filter that generates an in-phase signal by performing low-pass filtering on the first mixed signal, and a second filter that generates a quadrature-phase signal by performing low-pass filtering on the second mixed signal.
    Type: Application
    Filed: February 21, 2017
    Publication date: February 8, 2018
    Inventors: DAE YOUNG CHUNG, Jae Jin Park, Hee Chang Hwang
  • Publication number: 20180039810
    Abstract: A semiconductor device comprising a fingerprint sensor configured to generate first-direction sensing data and second-direction sensing data by sensing a fingerprint image in a first direction and a second direction, respectively, which is perpendicular to the first direction; a differential sensing circuit configured to generate first-direction first differential data and second-direction first differential data by performing a differential operation on the first-direction sensing data and the second-direction sensing data, respectively; and a fingerprint processing circuit configured to generate first-direction second differential data and second-direction second differential data by performing a differential operation on the first-direction first differential data and the second-direction first differential data, respectively, and generate fingerprint data by adding the first-direction second differential data and the second-direction second differential data.
    Type: Application
    Filed: July 12, 2017
    Publication date: February 8, 2018
    Inventors: Hee Chang HWANG, Jae Jin PARK, Min Chul LEE, Seung Hoon LEE, Dae Young CHUNG
  • Publication number: 20170153279
    Abstract: A lock-in amplifier includes a clock signal generator configured to generate a first demodulation clock signal and a second demodulation clock signal having a phase difference of 90 degrees and a same demodulation frequency; and a detector configured to, based on an input signal, the first demodulation clock signal, and the second demodulation clock signal, provide an offset voltage corresponding to an offset of the lock-in amplifier in a first operation mode, and provide a first output voltage and a second output voltage, each of which correspond to a demodulation frequency component of the input signal in a second operation mode.
    Type: Application
    Filed: November 23, 2016
    Publication date: June 1, 2017
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Dae-Young CHUNG, Jae-Jin PARK, Dong-Hyuk LIM
  • Patent number: 9632126
    Abstract: An integrated circuit includes an operational circuit and a test circuit for measuring a leakage current associated with all or part of the operational circuit. The leakage current measurement circuit may include a mirror circuit configured to mirror leakage current to a current-to-voltage converter and an analog-to-digital converter configured to convert the analog voltage representative of the leakage current developed by the current-to-voltage converter to a digital value.
    Type: Grant
    Filed: October 29, 2014
    Date of Patent: April 25, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kun-Yong Yoon, Jae-Jin Park, Ji-Hwan Hyun
  • Publication number: 20170111035
    Abstract: An edge detector includes a differential signal generator, a sense amplifier and a latch. The differential signal generator delays an input signal to generate a first differential signal and inverts the input signal to generate a second differential signal. The sense amplifier amplifies a difference between the first differential signal and the second differential signal to generate a first amplification signal and a second amplification signal at a first edge of a test clock signal and resets the first amplification signal and the second amplification signal at a second edge of the test clock signal. The latch generates an edge signal corresponding to edge information of the input signal in response to the first amplification signal and the second amplification signal.
    Type: Application
    Filed: July 11, 2016
    Publication date: April 20, 2017
    Inventors: DONG-SEOK LEE, WOO-SEOK KIM, JAE-JIN PARK, DONG-HYUK LIM, DAE-YOUNG CHUNG
  • Patent number: 9618958
    Abstract: A current generator includes a first current generation circuit configured to generate a first current having a first current noise which depends on a change in a supply voltage, a second current generation circuit configured to generate a second current having a second current noise which depends on the change in the supply voltage, and a current subtracting circuit configured to generate a third current with the first current noise and the second current noise removed by subtracting the second current from the first current.
    Type: Grant
    Filed: March 11, 2014
    Date of Patent: April 11, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Tae Kwang Jang, Jen Lung Liu, Nan Xing, Jae Jin Park
  • Publication number: 20170083034
    Abstract: A voltage regulator includes an error amplifier configured to receive a first voltage through a first node as an operating voltage, to amplify a difference between a reference voltage and a feedback voltage, and to output an amplified voltage; a power transistor connected between a second node through which a second voltage is supplied and an output node of the voltage regulator; and a switch circuit configured to select a level of a gate voltage supplied to a gate of the power transistor and level of a body voltage supplied to a body of the power transistor in response to a first power sequence of the first voltage, a second power sequence of the second voltage, and an operation control signal.
    Type: Application
    Filed: September 21, 2016
    Publication date: March 23, 2017
    Inventors: JUN HYEOK YANG, DAE YONG KIM, SANG HO KIM, JAE JIN PARK
  • Patent number: 9467135
    Abstract: A system-on-chip includes a body bias voltage generator having a voltage divider and a filter. The voltage divider includes a switched capacitor circuit and a resistor circuit. The switched capacitor circuit operates based on a first clock signal and a second clock signal. The resistor circuit outputs a first voltage through a first node, which is coupled to the switched capacitor circuit and the resistor circuit. The first and second clock signals have a same frequency. The filter performs a filtering operation on the first voltage to generate a body bias voltage.
    Type: Grant
    Filed: May 20, 2015
    Date of Patent: October 11, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sang-Kyu Kim, Jae-Jin Park, Seung-Hoon Lee