Abstract: Disclosed is a semiconductor memory device including a peripheral gate structure on a substrate, bitlines disposed on the peripheral gate structure and extending in a first direction, a protruding insulating pattern including channel trenches, extending in a second direction intersecting the first direction, channel structures disposed on the bitlines in the channel trenches and including a metal oxide, first wordlines disposed on the channel structures and extending in the second direction, second wordlines disposed on the channel structures, extending in the second direction, and spaced apart from the first wordlines in the first direction, landing pads disposed on the channel structures and connected to the channel structures, pad separation patterns disposed on the protruding insulating pattern and separating the landing pads, first passage patterns connected to the protruding insulating pattern through pad separation patterns and formed of an oxide-based insulating material, and data storage patterns dis

Abstract: The present invention provides a concrete vacuum tube segment for a hyper-speed transportation system using ultra-high performance concrete (UHPC) and a manufacturing method thereof. A concrete vacuum tube segment for a hyper-speed transportation system can be easily manufactured using UHPC, in which shrinkage and structural cracking do not occur due to mixing a binder and a short fiber to secure airtightness on the basis of a maximum fill theory, and accordingly, shrinkage of the concrete vacuum tube segment can be reduced even in a partial-vacuum state in which the magnitude of drying shrinkage is very small and quick drying occurs; when mixing the UHPC, an antifoaming agent is mixed and a circular vacuum pump is used to remove generated entrapped air to minimize the entrapped air; and a capsule-type crack healing material, which is able to repair fine cracks, is compacted to secure airtightness of the concrete vacuum tube segment.

Abstract: The present invention provides a crack repair material of a concrete vacuum tube segment using ultra-high performance concrete (UHPC) for a hyper-speed transportation system and a crack repairing method for the same capable of, in a case in which a vacuum tube segment of a hyper-speed transportation system, such as the Hyperloop, is manufactured using UHPC, repairing cracks formed in the UHPC vacuum tube segment easily and conveniently using a crack growth prevention material and a patch repair material and capable of immediately repairing cracks formed in the UHPC vacuum tube segment to secure airtightness so that operation of a vacuum pump is minimized and overload of the vacuum pump is prevented.

Abstract: The present disclosure relates to ultra-high density concrete composite containing super-absorbent polymer (SAP)-Attached Fibers, suitable for making a near-vacuum tube for hyperloop transportation system, a method for manufacturing the ultra-high density concrete composite, a method for manufacturing a concrete member using the ultra-high density concrete composite and an ultra-high density concrete member manufactured by the method.

Abstract: The present invention provides a crack repair material of a concrete vacuum tube segment using ultra-high performance concrete (UHPC) for a hyper-speed transportation system and a crack repairing method for the same capable of, in a case in which a vacuum tube segment of a hyper-speed transportation system, such as the Hyperloop, is manufactured using UHPC, repairing cracks formed in the UHPC vacuum tube segment easily and conveniently using a crack growth prevention material and a patch repair material and capable of immediately repairing cracks formed in the UHPC vacuum tube segment to secure airtightness so that operation of a vacuum pump is minimized and overload of the vacuum pump is prevented.

Abstract: The present invention provides a concrete vacuum tube segment for a hyper-speed transportation system using ultra-high performance concrete (UHPC) and a manufacturing method thereof. A concrete vacuum tube segment for a hyper-speed transportation system can be easily manufactured using UHPC, in which shrinkage and structural cracking do not occur due to mixing a binder and a short fiber to secure airtightness on the basis of a maximum fill theory, and accordingly, shrinkage of the concrete vacuum tube segment can be reduced even in a partial-vacuum state in which the magnitude of drying shrinkage is very small and quick drying occurs; when mixing the UHPC, an antifoaming agent is mixed and a circular vacuum pump is used to remove generated entrapped air to minimize the entrapped air; and a capsule-type crack healing material, which is able to repair fine cracks, is compacted to secure airtightness of the concrete vacuum tube segment.

Abstract: An integrated circuit device includes a substrate including a first conductivity type region and a second conductivity type region, a first active region arranged in the second conductivity type region, a second active region arranged in the first conductivity type region and spaced apart from the first active region with an isolation region between the second active region and the first active region, an isolation film formed in the isolation region, and a first field cut region extending along the isolation region in a first direction parallel with a channel length direction of each of a first conductivity type transistor on the first active region and a second conductivity type transistor on the second active region.

Abstract: An integrated circuit device includes a substrate including a first conductivity type region and a second conductivity type region, a first active region arranged in the second conductivity type region, a second active region arranged in the first conductivity type region and spaced apart from the first active region with an isolation region between the second active region and the first active region, an isolation film formed in the isolation region, and a first field cut region extending along the isolation region in a first direction parallel with a channel length direction of each of a first conductivity type transistor on the first active region and a second conductivity type transistor on the second active region.

Abstract: A semiconductor device is provided. The semiconductor device includes an upper interlayer insulating layer disposed on a substrate. A first electrode spaced apart from the upper interlayer insulating layer is disposed on the substrate. A contact structure penetrating the upper interlayer insulating layer is disposed on the substrate. An upper support layer having a first portion covering an upper surface of the upper interlayer insulating layer, to surround an upper side surface of the contact structure, and a second portion extending in a horizontal direction from the first portion and surrounding an upper side surface of the first electrode, is disposed. A dielectric conformally covering the first electrode and a second electrode on the dielectric are disposed.

Abstract: A semiconductor device including a substrate; a trench formed within the substrate; a gate insulating film formed conformally along a portion of a surface of the trench; a gate electrode formed on the gate insulating film and filling a portion of the trench; a capping film formed on the gate electrode and filling the trench; and an air gap formed between the capping film and the gate insulating film.

Abstract: A semiconductor device including a substrate; a trench formed within the substrate; a gate insulating film formed conformally along a portion of a surface of the trench; a gate electrode formed on the gate insulating film and filling a portion of the trench; a capping film formed on the gate electrode and filling the trench; and an air gap formed between the capping film and the gate insulating film.

Abstract: A semiconductor device is provided. The semiconductor device includes an upper interlayer insulating layer disposed on a substrate. A first electrode spaced apart from the upper interlayer insulating layer is disposed on the substrate. A contact structure penetrating the upper interlayer insulating layer is disposed on the substrate. An upper support layer having a first portion covering an upper surface of the upper interlayer insulating layer, to surround an upper side surface of the contact structure, and a second portion extending in a horizontal direction from the first portion and surrounding an upper side surface of the first electrode, is disposed. A dielectric conformally covering the first electrode and a second electrode on the dielectric are disposed.

Abstract: A semiconductor device includes an active area defined by a device isolation layer and including a plurality of source/drain regions, a gate structure disposed on the active area and extending in a first direction, a stress layer contacting a side surface of each of the plurality of source/drain regions and a plurality of source/drain contacts disposed in the active area and connected to the plurality of source/drain regions.