Abstract: A lightning rod with an electric double layer and electric dipole moment type discharge amplification function, the lightning rod including: a support member (100) for moving a lightning current to the ground; an emission member (200) fitted to the support member (100) to collect charges of the ground according to the approach of a thundercloud and thus emit a large number of ions with the opposite polarity to the polarity of the thundercloud; ground charge chargers (300) fitted to the support member (100) and having spaces formed therein to charge the charges of the ground; an insulation member (400) disposed on top of the emission member (200); and discharge induction members (500) fixedly disposed on top and underside of the emission member (200) by means of the insulation member (400).

Abstract: A method of operating an application processor including a central processing unit (CPU) with at least one core and a memory interface includes measuring, during a first period, a core active cycle of a period in which the at least one core performs an operation to execute instructions and a core idle cycle of a period in which the at least one core is in an idle state, generating information about a memory access stall cycle of a period in which the at least one core accesses the memory interface in the core active cycle, correcting the core active cycle using the information about the memory access stall cycle to calculate a load on the at least one core using the corrected core active cycle, and performing a DVFS operation on the at least one core using the calculated load on the at least one core.

Abstract: A system on chip and a method for operating a system on chip are provided. The system on chip a plurality of intellectual property (IP) cores including a first IP core configured to process data in real-time, a buffer including a plurality of queues, and processing circuitry configured to, generate first traffic data corresponding to first data output from the first IP core, and reserve at least one queue of the plurality of queues as a first dedicated area based on the first traffic data, the first dedicated area configured to be used as a queue for transmission of the first data.

Abstract: A method of operating an application processor including a central processing unit (CPU) with at least one core and a memory interface includes measuring, during a first period, a core active cycle of a period in which the at least one core performs an operation to execute instructions and a core idle cycle of a period in which the at least one core is in an idle state, generating information about a memory access stall cycle of a period in which the at least one core accesses the memory interface in the core active cycle, correcting the core active cycle using the information about the memory access stall cycle to calculate a load on the at least one core using the corrected core active cycle, and performing a DVFS operation on the at least one core using the calculated load on the at least one core.

Abstract: A method of operating an application processor including a central processing unit (CPU) with at least one core and a memory interface includes measuring, during a first period, a core active cycle of a period in which the at least one core performs an operation to execute instructions and a core idle cycle of a period in which the at least one core is in an idle state, generating information about a memory access stall cycle of a period in which the at least one core accesses the memory interface in the core active cycle, correcting the core active cycle using the information about the memory access stall cycle to calculate a load on the at least one core using the corrected core active cycle, and performing a DVFS operation on the at least one core using the calculated load on the at least one core.

Abstract: A method of operating an application processor including a central processing unit (CPU) with at least one core and a memory interface includes measuring, during a first period, a core active cycle of a period in which the at least one core performs an operation to execute instructions and a core idle cycle of a period in which the at least one core is in an idle state, generating information about a memory access stall cycle of a period in which the at least one core accesses the memory interface in the core active cycle, correcting the core active cycle using the information about the memory access stall cycle to calculate a load on the at least one core using the corrected core active cycle, and performing a DVFS operation on the at least one core using the calculated load on the at least one core.

Abstract: A method of operating an application processor including a central processing unit (CPU) with at least one core and a memory interface includes measuring, during a first period, a core active cycle of a period in which the at least one core performs an operation to execute instructions and a core idle cycle of a period in which the at least one core is in an idle state, generating information about a memory access stall cycle of a period in which the at least one core accesses the memory interface in the core active cycle, correcting the core active cycle using the information about the memory access stall cycle to calculate a load on the at least one core using the corrected core active cycle, and performing a DVFS operation on the at least one core using the calculated load on the at least one core.

Abstract: A method of operating an application processor including a central processing unit (CPU) with at least one core and a memory interface includes measuring, during a first period, a core active cycle of a period in which the at least one core performs an operation to execute instructions and a core idle cycle of a period in which the at least one core is in an idle state, generating information about a memory access stall cycle of a period in which the at least one core accesses the memory interface in the core active cycle, correcting the core active cycle using the information about the memory access stall cycle to calculate a load on the at least one core using the corrected core active cycle, and performing a DVFS operation on the at least one core using the calculated load on the at least one core.

Abstract: A slim electronic device is provided. The slim electronic device includes a substrate having an opening formed therein, and an audio component accommodated in the opening of the substrate without overlapping the substrate and disposed such that the top and bottom thereof are substantially parallel to the top and bottom of the substrate.

Abstract: A slim electronic device is provided. The slim electronic device includes a substrate having an opening formed therein, and an audio component accommodated in the opening of the substrate without overlapping the substrate and disposed such that the top and bottom thereof are substantially parallel to the top and bottom of the substrate.

Abstract: A system and a method for motion estimation are disclosed. The system for motion estimation in accordance with an embodiment of the present invention includes: a plurality of motion sensors mounted near joints of a body and configured to provide motion information; a depth sensor configured to provide 3-dimensional image information having a 3-dimensional coordinate for each pixel; and a motion estimation device configured to estimate a motion by use of the motion information and the 3-dimensional image information, wherein the motion estimation device includes: a converging unit configured to compute mounting position information of the motion sensors by performing an initialization process by converging the motion information and the 3-dimensional image information; and an estimating unit configured to estimate the motion by computing a state vector including the mounting position information and the motion information.

Abstract: A shield reinforcing apparatus is provided. The shield reinforcing apparatus includes a printed circuit board, a shield member that covers the printed circuit board, and at least one shield reinforcing part provided in the printed circuit board and configured to contact the shield member to be pressed.

Abstract: A system and a method for motion estimation are disclosed. The system for motion estimation in accordance with an embodiment of the present invention includes: a plurality of motion sensors mounted near joints of a body and configured to provide motion information; a depth sensor configured to provide 3-dimensional image information having a 3-dimensional coordinate for each pixel; and a motion estimation device configured to estimate a motion by use of the motion information and the 3-dimensioanl image information, wherein the motion estimation device includes: a converging unit configured to compute mounting position information of the motion sensors by performing an initialization process by converging the motion information and the 3-dimensional image information; and an estimating unit configured to estimate the motion by computing a state vector including the mounting position information and the motion information.

Abstract: A shield reinforcing apparatus is provided. The shield reinforcing apparatus includes a printed circuit board, a shield member that covers the printed circuit board, and at least one shield reinforcing part provided in the printed circuit board and configured to contact the shield member to be pressed.

Abstract: A portable communication device comprises a cover part in which the existing front cover part and the battery cover part are integrally formed with each other. The portable communication device includes a battery pack; a window; a keypad; a printed circuit board with an LCD module; an LCD bracket for attaching the window; and a cover part whose front side is open and which forms a mounting space toward its inside, wherein the battery pack, the printed circuit board coupled with the keypad, the LCD bracket and the window are provided within the mounting space.

Abstract: A portable communication device comprises a cover part in which the existing front cover part and the battery cover part are integrally formed with each other. The portable communication device includes a battery pack; a window; a keypad; a printed circuit board with an LCD module; an LCD bracket for attaching the window; and a cover part whose front side is open and which forms a mounting space toward its inside, wherein the battery pack, the printed circuit board coupled with the keypad, the LCD bracket and the window are provided within the mounting space.