Patents by Inventor Jae-jun Moon

Jae-jun Moon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7102433
    Abstract: A boosting circuit is disclosed. The boosting circuit includes an input circuit part for outputting a differential current proportional to input voltages; a bias circuit part for mirroring the differential current, and producing an inverted differential current that the differential current is inverted; and an output circuit part for adjusting magnitudes of the differential current and the inverted differential current based on a predetermined ratio of MOS transistors, respectively, adding the adjusted differential current and inverted differential current, and producing an output current in a push-pull form. Accordingly, the boosting circuit has a broad maximum differentiable frequency bandwidth, and facilitates the adjustments of differentiation characteristics of an output current. Further, an amount of output current of differentiation form is not affected by external factors such as voltages, processes, temperatures, and so on.
    Type: Grant
    Filed: January 6, 2004
    Date of Patent: September 5, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeong-won Lee, Jae-jun Moon, Soo-jung Chang
  • Patent number: 6903671
    Abstract: Disclosed is a digital-to-analog (D/A) converter with low skew and glitches. The D/A converter has current cells each outputting a different current amount and current switches selectively enabling the current cells, and obtains an analog signal from voltages corresponding to output currents of the current cells by operating the current switches, characterized in that the current switches are each provided with MOS transistors each having an adjusted aspect ratio so as to have a constant capacitance load regardless of the output current amounts from the current cells. In such a D/A converter, parasitic capacitances of MOS transistors provided in the current switches are adjusted constant regardless of output current amounts, so that the D/A converter can operate at a high speed with low skew and glitch.
    Type: Grant
    Filed: January 23, 2004
    Date of Patent: June 7, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dae-hoon Kwon, Gae-ok Cho, Jae-jun Moon
  • Publication number: 20040164790
    Abstract: Disclosed is a bias circuit having a start-up circuit. The bias circuit having a start-up circuit has a bias circuit part using a current mirror circuit, and for generating a constant bias voltage to an output node from an application of a power source voltage, and a start-up circuit part having a capacitor connected between the output node and a common node of in common connecting gates of MOS transistors constructing the current mirror circuit. Accordingly, the bias circuit prevents noise delivered from a power source voltage and power consumption due to static currents, and eliminates the oscillation possibility with stability improved in a high frequency range.
    Type: Application
    Filed: February 13, 2004
    Publication date: August 26, 2004
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae-jun Moon, Jeong-won Lee, Jung-eun Lee
  • Publication number: 20040150542
    Abstract: Disclosed is a digital-to-analog (D/A) converter with low skew and glitches. The D/A converter has current cells each outputting a different current amount and current switches selectively enabling the current cells, and obtains an analog signal from voltages corresponding to output currents of the current cells by operating the current switches, characterized in that the current switches are each provided with MOS transistors each having an adjusted aspect ratio so as to have a constant capacitance load regardless of the output current amounts from the current cells. In such a D/A converter, parasitic capacitances of MOS transistors provided in the current switches are adjusted constant regardless of output current amounts, so that the D/A converter can operate at a high speed with low skew and glitch.
    Type: Application
    Filed: January 23, 2004
    Publication date: August 5, 2004
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dae-hoon Kwon, Gae-ok Cho, Jae-jun Moon
  • Publication number: 20040145412
    Abstract: A boosting circuit is disclosed. The boosting circuit includes an input circuit part for outputting a differential current proportional to input voltages; a bias circuit part for mirroring the differential current, and producing an inverted differential current that the differential current is inverted; and an output circuit part for adjusting magnitudes of the differential current and the inverted differential current based on a predetermined ratio of MOS transistors, respectively, adding the adjusted differential current and inverted differential current, and producing an output current in a push-pull form. Accordingly, the boosting circuit has a broad maximum differentiable frequency bandwidth, and facilitates the adjustments of differentiation characteristics of an output current. Further, an amount of output current of differentiation form is not affected by external factors such as voltages, processes, temperatures, and so on.
    Type: Application
    Filed: January 6, 2004
    Publication date: July 29, 2004
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jeong-won Lee, Jae-jun Moon, Soo-jung Chang