Abstract: A wearable device which is mountable on a wrist of a user includes a housing including a metal structure, a display positioned within the housing, wherein the display includes a metal layer positioned within the metal structure and spaced apart from the metal structure by a given gap, a printed circuit board (PCB) positioned within the housing and including a ground region, and a control circuit positioned on the PCB and configured to feed a first point of the metal structure. The metal layer is electrically connected with the ground region of the PCB at a second point spaced from the first point by a given angle.

Abstract: A wearable device which is mountable on a wrist of a user includes a housing including a metal structure, a display positioned within the housing, wherein the display includes a metal layer positioned within the metal structure and spaced apart from the metal structure by a given gap, a printed circuit board (PCB) positioned within the housing and including a ground region, and a control circuit positioned on the PCB and configured to feed a first point of the metal structure. The metal layer is electrically connected with the ground region of the PCB at a second point spaced from the first point by a given angle.

Abstract: A wearable device which is mountable on a wrist of a user includes a housing including a metal structure, a display positioned within the housing, wherein the display includes a metal layer positioned within the metal structure and spaced apart from the metal structure by a given gap, a printed circuit board (PCB) positioned within the housing and including a ground region, and a control circuit positioned on the PCB and configured to feed a first point of the metal structure. The metal layer is electrically connected with the ground region of the PCB at a second point spaced from the first point by a given angle.

Abstract: A wearable device which is mountable on a wrist of a user includes a housing including a metal structure, a display positioned within the housing, wherein the display includes a metal layer positioned within the metal structure and spaced apart from the metal structure by a given gap, a printed circuit board (PCB) positioned within the housing and including a ground region, and a control circuit positioned on the PCB and configured to feed a first point of the metal structure. The metal layer is electrically connected with the ground region of the PCB at a second point spaced from the first point by a given angle.

Abstract: A wearable device which is mountable on a wrist of a user includes a housing including a metal structure, a display positioned within the housing, wherein the display includes a metal layer positioned within the metal structure and spaced apart from the metal structure by a given gap, a printed circuit board (PCB) positioned within the housing and including a ground region, and a control circuit positioned on the PCB and configured to feed a first point of the metal structure. The metal layer is electrically connected with the ground region of the PCB at a second point spaced from the first point by a given angle.

Abstract: A wearable device which is mountable on a wrist of a user includes a housing including a metal structure, a display positioned within the housing, wherein the display includes a metal layer positioned within the metal structure and spaced apart from the metal structure by a given gap, a printed circuit board (PCB) positioned within the housing and including a ground region, and a control circuit positioned on the PCB and configured to feed a first point of the metal structure. The metal layer is electrically connected with the ground region of the PCB at a second point spaced from the first point by a given angle.

Abstract: A method and device for managing a Base Station (BS) list by a first electronic device. The method includes transmitting the BS list to a second electronic device connected to the first electronic device via short-range communication; determining whether a preset time lapses from the transmission of the BS list; updating the BS list when the preset time lapses; and transmitting the updated BS list to the second electronic device. The device includes a communication module configured to transmit the BS list to a second electronic device connected to the first electronic device via short-range communication; and a list management module configured to determine whether a preset time lapses from the transmission of the BS list, update the BS list when the preset time lapses, and control the communication module to transmit the updated BS list to the second electronic device.

Abstract: An apparatus for measuring biometric information includes a cover, a sensor provided inside the cover, for measuring biometric information, and an electrode assembly provided outside the cover, and having a guide therein in at least partial alignment with a cover opening. The arrangement of the electrode assembly on the outside of the cover provides a measurement distance for measuring the biometric information.

Abstract: A method and device for managing a Base Station (BS) list by a first electronic device. The method includes transmitting the BS list to a second electronic device connected to the first electronic device via short-range communication; determining whether a preset time lapses from the transmission of the BS list; updating the BS list when the preset time lapses; and transmitting the updated BS list to the second electronic device. The device includes a communication module configured to transmit the BS list to a second electronic device connected to the first electronic device via short-range communication; and a list management module configured to determine whether a preset time lapses from the transmission of the BS list, update the BS list when the preset time lapses, and control the communication module to transmit the updated BS list to the second electronic device.

Abstract: An apparatus and a method for driving a communication terminal are provided. A method for driving a communication terminal according to the present invention includes determining, when a proximity of an object is detected, data based on a proximity duration for which the proximity is maintained, and executing, when an execution request is detected, a function corresponding to the data. Since a specific function is executed in response to the information on the proximity of an object to the communication terminal, there is no need to display touch keys on the screen, resulting in improvement of user's convenience.

Abstract: A memory bank includes an array of memory cells, word lines for accessing the memory cells, and word line drivers coupled to the word lines. When the memory bank is being accessed, the word line drivers are coupled to receive a first supply voltage, which is applied to the non-selected word lines of the memory bank. The first supply voltage turns off access transistors of the memory cells coupled to the non-selected word lines. When the memory bank is not being accessed, the word line drivers are coupled to receive a second supply voltage, which is applied to each of the word lines of the memory bank. The second supply voltage turns off the access transistors of the memory cells coupled of the word lines. The first and second supply voltages are selected such that the first supply voltage turns off the access transistors harder than the second supply voltage.

Abstract: An apparatus and a method for driving a communication terminal are provided. A method for driving a communication terminal according to the present invention includes determining, when a proximity of an object is detected, data based on a proximity duration for which the proximity is maintained, and executing, when an execution request is detected, a function corresponding to the data. Since a specific function is executed in response to the information on the proximity of an object to the communication terminal, there is no need to display touch keys on the screen, resulting in improvement of user's convenience.

Abstract: A memory bank includes an array of memory cells, word lines for accessing the memory cells, and word line drivers coupled to the word lines. When the memory bank is being accessed, the word line drivers are coupled to receive a first supply voltage, which is applied to the non-selected word lines of the memory bank. The first supply voltage turns off access transistors of the memory cells coupled to the non-selected word lines. When the memory bank is not being accessed, the word line drivers are coupled to receive a second supply voltage, which is applied to each of the word lines of the memory bank. The second supply voltage turns off the access transistors of the memory cells coupled of the word lines. The first and second supply voltages are selected such that the first supply voltage turns off the access transistors harder than the second supply voltage.

Abstract: A memory system is provided that includes an array of memory cells that require periodic refresh, and a temperature-adaptive refresh controller. Data retention time of the memory cells decreases exponentially as temperature increases. The temperature-adaptive refresh controller selects the refresh period of the memory cells in response to the subthreshold current of a reference transistor. The subthreshold current of the reference transistor increases exponentially as temperature increases As a result, the refresh period is empirically tied to the data retention time. Consequently, the power required for refresh operations decreases as temperature decreases. Power is therefore conserved in applications that operate predominantly at room temperature.

Abstract: A method and apparatus for handling the refresh of a DRAM array or other memory array requiring periodic refresh operations so that the refresh does not require explicit control signaling nor handshake communication between the memory array and an external accessing client. The method and apparatus handles external accesses and refresh operations such that the refresh operations do not interfere with the external accesses under any conditions. As a result, an SRAM compatible device can be built from DRAM or 1-Transistor cells. A clock division scheme is implemented to allow N external accesses and one refresh operation to be performed during N consecutive clock cycles.

Abstract: A memory system is provided that includes an array of memory cells that require periodic refresh, and a temperature-adaptive refresh controller. Data retention time of the memory cells decreases exponentially as temperature increases. The temperature-adaptive refresh controller selects the refresh period of the memory cells in response to the subthreshold current of a reference transistor. The subthreshold current of the reference transistor increases exponentially as temperature increases As a result, the refresh period is empirically tied to the data retention time. Consequently, the power required for refresh operations decreases as temperature decreases. Power is therefore conserved in applications that operate predominantly at room temperature.

Abstract: A method and apparatus for handling the refresh of a DRAM array or other memory array requiring periodic refresh operations so that the refresh does not require explicit control signaling nor handshake communication between the memory array and an external accessing client. The method and apparatus handles external accesses and refresh operations such that the refresh operations do not interfere with the external accesses under any conditions. As a result, an SRAM compatible device can be built from DRAM or 1-Transistor cells. A clock division scheme is implemented to allow N external accesses and one refresh operation to be performed during N consecutive clock cycles.

Abstract: Disclosed is a coaxial tube wiring structure (and method of making) of a semiconductor memory device for shielding a conductive film that transmits a signal. The coaxial tube structure includes: a plurality of signal conductive films formed on a substrate; and an arbitrary conductive film which shields the upper and lower surfaces and both sides of the signal conductive film, which is insulated from the signal conductive film by an insulating film, and to which ground voltage is applied.

Abstract: A circuit and method for performing a delay locked function for correcting phase differences between an input clock signal RCLK and an internally generated clock signal ICLK and for controlling the correcting step to maintain an accurate locking operation when a phase difference is below a threshold valve (the maximum time for which the internal step jitter may occur).

Abstract: A semiconductor memory device having a ground noise isolation circuit which prevents the influence of noise which occurs due to ground bouncing which causes erroneous data reading of a memory cell. The ground noise isolation circuit generates a pulse signal having a predetermined width in accordance with a chip enable signal for controlling the output of a data output unit when the data output unit outputs data and by disconnecting a sense amplifier driving transistor during the generation of the pulse signal.