Patents by Inventor Jae Kyu Cho

Jae Kyu Cho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240161597
    Abstract: A device for establishing a communication network and collecting situation information at a site of a collapse disaster is disclosed. The device includes a ground drone 10 deployed at the site of the collapse disaster, the ground drone 10 having a communication device 80 mounted thereon, a flying drone 32 mounted on and carried by the ground drone 10 to fly and photograph the site of the collapse disaster, a camera device 40 mounted on the ground drone 10 to photograph surroundings of the ground drone 10, a storage 50 installed on the ground drone 10, and a plurality of repeater modules 60 connected by the wireless communication network to relay wireless communications between the ground drone 10, the flying drone 32, and a command and control center 100, wherein the storage 50 accommodates the repeater modules 60, and throws the repeater modules 60 in response to an operation signal.
    Type: Application
    Filed: June 21, 2023
    Publication date: May 16, 2024
    Inventors: Si Beum CHO, Kyung Su LEE, Jae Jeong KIM, Cheol Kyu LEE, Tae Wook LEE
  • Publication number: 20240163401
    Abstract: A buried person search device using a detachable module is disclosed. The device includes a ground drone 10 deployed at a site of a collapse disaster, the ground drone 10 having a communication device 80 and a first beacon, a camera device 40 mounted on the ground drone 10 to photograph surroundings of the ground drone 10, a storage 50 installed on the ground drone 10, a plurality of repeater modules 60 connected by a wireless communication network to relay wireless communications between the ground drone 10, a flying drone 32, and a command and control center 100, each of the repeater modules 60 having a second beacon, and a sensing device 70 installed on the ground drone 10 or the repeater modules 60 to collect a sound, wherein the storage 50 accommodates the repeater modules 60, and throws the repeater modules 60 in response to an operation signal.
    Type: Application
    Filed: June 21, 2023
    Publication date: May 16, 2024
    Inventors: Si Beum CHO, Kyung Su LEE, Jae Jeong KIM, Cheol Kyu LEE, Tae Wook LEE
  • Publication number: 20240139003
    Abstract: Provided is a bioresorbable stent including a stent substrate including a bioresorbable polymer and a contrast medium containing an iodine component, coated on the stent substrate. Since the stent according to the present invention is absorbed in and removed from the human body after a predetermined time, it has excellent biodegradability since it has improved radiopacity by iodine contrast medium coating, it has a high radiography contrast and is very efficient even when a procedure is performed with real time radiography, and since it has low foreshortening and high flexibility, radial force, and re-coil, it may be useful for insertion into a blood vessel having a small diameter, an acute occlusive lesion, an imminent occlusive lesion, and the like.
    Type: Application
    Filed: May 13, 2022
    Publication date: May 2, 2024
    Inventors: Myung Ho JEONG, Dae Sung PARK, Jae Un KIM, Mun Ki KIM, Doo Sun SIM, Kyung Hoon CHO, Dae Young HYUN, Jun Kyu PARK
  • Publication number: 20240127746
    Abstract: A light emitting display device includes a display panel including a first pixel group including a plurality of pixels in 2N rows. The light emitting display device further includes a second pixel group disposed subsequent to the first pixel group and including a plurality of pixels in 2N rows. The light emitting display device further includes an emission signal unit including a first emission stage for applying the same first emission signal to the first pixel group and a second emission stage for applying the same second emission signal to the second pixel group. In a first frame, a falling time of the first emission signal and a rising time of the second emission signal are different from each other.
    Type: Application
    Filed: December 22, 2023
    Publication date: April 18, 2024
    Applicant: LG Display Co., Ltd.
    Inventors: Jeong Ki KIM, Joon Young PARK, Jae Woo PARK, Sung Min CHO, Hyeong Kyu KIM
  • Patent number: 11948752
    Abstract: A ceramic electronic component includes a body including a dielectric layer and an internal electrode, and an external electrode disposed on the body and connected to the internal electrode. The dielectric layer includes a plurality of dielectric grains, and at least one of the plurality of dielectric grains has a core-dual shell structure having a core and a dual shell. The dual shell includes a first shell surrounding at least a portion of the core, and a second shell surrounding at least a portion of the first shell, and a concentration of a rare earth element included in the second shell is more than 1.3 times to less than 3.8 times a concentration of a rare earth element included in the first shell.
    Type: Grant
    Filed: December 21, 2022
    Date of Patent: April 2, 2024
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Sung Hyung Kang, Jong Hyun Cho, Ji Hong Jo, Hang Kyu Cho, Jae Shik Shim, Yong In Kim, Sang Roc Lee
  • Publication number: 20240103362
    Abstract: Disclosed herein is a method of printing a nanostructure including: preparing a template substrate on which a pattern is formed; forming a replica pattern having an inverse phase of the pattern by coating a polymer thin film on an upper portion of the template substrate, adhering a thermal release tape to an upper portion of the polymer thin film, and separating the polymer thin film from the template substrate; forming a nanostructure by depositing a functional material on the replica pattern; and printing the nanostructure deposited on the replica pattern to a substrate by positioning the nanostructure on the substrate, applying heat and pressure to the nanostructure, and weakening an adhesive force between the thermal release tape and the replica pattern by the heat.
    Type: Application
    Filed: September 19, 2023
    Publication date: March 28, 2024
    Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Jong Min KIM, Seung Yong LEE, So Hye CHO, Ho Seong JANG, Jae Won CHOI, Chang Kyu HWANG
  • Publication number: 20240091759
    Abstract: Disclosed herein is a method of depositing a transition metal single-atom catalyst including preparing a carbon carrier, and depositing a transition metal single-atom catalyst on the carbon carrier, in which the carbon carrier is surface-treated by an oxidation process, and wherein the deposition is carried out by an arc plasma process.
    Type: Application
    Filed: September 15, 2023
    Publication date: March 21, 2024
    Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Jong Min KIM, Sang Hoon KIM, Chang Kyu HWANG, Seung Yong LEE, So Hye CHO, Jae Won CHOI
  • Publication number: 20240079311
    Abstract: A semiconductor package includes a film substrate; a wiring layer provided on the film substrate; and a semiconductor chip provided on the wiring layer and electrically connected to the wiring layer. The film substrate includes a first layer, wherein the first layer is an insulating layer having the wiring layer thereon. The film substrate further includes a second layer, wherein the second layer is attached to a bottom of the first layer and comprises a gas. The second layer is configured to be peeled off of the first layer.
    Type: Application
    Filed: August 1, 2023
    Publication date: March 7, 2024
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seung Hyun CHO, Jeong-Kyu Ha, Jae-Min Jung
  • Patent number: 11804452
    Abstract: A photonic integrated circuit (PIC) structure includes an active region in at least an active layer over a substrate, the active region including a plurality of transistors therein. A plurality of dielectric interconnect layers are over the active region, and an opening is defined through the plurality of dielectric interconnect layers. The opening extends to at least the active layer. A barrier is within the plurality of dielectric interconnect layers and surrounding the opening. An optical element is positioned in the opening. The barrier prevents stress damage, such as cracks and/or delaminations, from propagating from or to the opening, and maintains the hermetic seal of the PIC structure.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: October 31, 2023
    Assignee: GLOBALFOUNDRIES U.S. Inc.
    Inventors: Nicholas A Polomoff, Jae Kyu Cho, Mohamed Rabie, Yunyao Jiang, Koushik Ramachandran, Pallabi Das
  • Patent number: 11740418
    Abstract: Embodiments of the disclosure provide a photonic integrated circuit (PIC) structure with a passage for a waveguide through a barrier structure. The PIC structure includes a barrier structure on a substrate, having a first sidewall and a second sidewall opposite the first sidewall. A passage is within the barrier structure, and extends from a first end at the first sidewall of the barrier structure to a second end at the second sidewall of the barrier structure. A shape of the passage includes a reversal segment between the first end and the second end. A waveguide within the passage and extends from the first end to the second end of the barrier structure.
    Type: Grant
    Filed: March 23, 2021
    Date of Patent: August 29, 2023
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Nicholas A. Polomoff, John J. Ellis-Monaghan, Frank G. Kuechenmeister, Jae Kyu Cho, Michal Rakowski
  • Publication number: 20230030723
    Abstract: A photonic integrated circuit (PIC) structure includes an active region in at least an active layer over a substrate, the active region including a plurality of transistors therein. A plurality of dielectric interconnect layers are over the active region, and an opening is defined through the plurality of dielectric interconnect layers. The opening extends to at least the active layer. A barrier is within the plurality of dielectric interconnect layers and surrounding the opening. An optical element is positioned in the opening. The barrier prevents stress damage, such as cracks and/or delaminations, from propagating from or to the opening, and maintains the hermetic seal of the PIC structure.
    Type: Application
    Filed: July 30, 2021
    Publication date: February 2, 2023
    Inventors: Nicholas A. Polomoff, Jae Kyu Cho, Mohamed Rabie, Yunyao Jiang, Koushik Ramachandran, Pallabi Das
  • Patent number: 11569180
    Abstract: Structures for an optical fiber groove and methods of forming a structure for an optical fiber groove. A photonics chip includes a substrate and an interconnect structure over the substrate. The photonics chip has a first exterior corner, a second exterior corner, and a side edge extending from the first exterior corner to the second exterior corner. The substrate includes a groove positioned along the side edge between the first exterior corner and the second exterior corner. The groove is arranged to intersect the side edge at a groove corner, and the interconnect structure includes metal structures adjacent to the first groove corner. The metal structures extend diagonally in the interconnect structure relative to the side edge of the photonics chip.
    Type: Grant
    Filed: August 12, 2021
    Date of Patent: January 31, 2023
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Nicholas A. Polomoff, Jae Kyu Cho, Mohamed A. Rabie, Andreas D. Stricker
  • Patent number: 11543606
    Abstract: Structures including an edge coupler and a crackstop, as well as methods of forming a structure including an edge coupler and a crackstop. A waveguide core and a crackstop are located over a top surface of a dielectric layer. A communication passageway is either optically coupled or electrically coupled to the waveguide core. The communication passageway, which may include an electric conductor or a buried waveguide core, extends laterally beneath the crackstop.
    Type: Grant
    Filed: March 9, 2021
    Date of Patent: January 3, 2023
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Nicholas A. Polomoff, Jae Kyu Cho, Frank Kuechenmeister, John J. Ellis-Monaghan, Michal Rakowski
  • Publication number: 20220308297
    Abstract: Embodiments of the disclosure provide a photonic integrated circuit (PIC) structure with a passage for a waveguide through a barrier structure. The PIC structure includes a barrier structure on a substrate, having a first sidewall and a second sidewall opposite the first sidewall. A passage is within the barrier structure, and extends from a first end at the first sidewall of the barrier structure to a second end at the second sidewall of the barrier structure. A shape of the passage includes a reversal segment between the first end and the second end. A waveguide within the passage and extends from the first end to the second end of the barrier structure.
    Type: Application
    Filed: March 23, 2021
    Publication date: September 29, 2022
    Inventors: Nicholas A. Polomoff, John J. Ellis-Monaghan, Frank G. Kuechenmeister, Jae Kyu Cho, Michal Rakowski
  • Publication number: 20220291464
    Abstract: Structures including an edge coupler and a crackstop, as well as methods of forming a structure including an edge coupler and a crackstop. A waveguide core and a crackstop are located over a top surface of a dielectric layer. A communication passageway is either optically coupled or electrically coupled to the waveguide core. The communication passageway, which may include an electric conductor or a buried waveguide core, extends laterally beneath the crackstop.
    Type: Application
    Filed: March 9, 2021
    Publication date: September 15, 2022
    Inventors: Nicholas A. Polomoff, Jae Kyu Cho, Frank Kuechenmeister, John J. Ellis-Monaghan, Michal Rakowski
  • Publication number: 20210375788
    Abstract: Structures for an optical fiber groove and methods of forming a structure for an optical fiber groove. A photonics chip includes a substrate and an interconnect structure over the substrate. The photonics chip has a first exterior corner, a second exterior corner, and a side edge extending from the first exterior corner to the second exterior corner. The substrate includes a groove positioned along the side edge between the first exterior corner and the second exterior corner. The groove is arranged to intersect the side edge at a groove corner, and the interconnect structure includes metal structures adjacent to the first groove corner. The metal structures extend diagonally in the interconnect structure relative to the side edge of the photonics chip.
    Type: Application
    Filed: August 12, 2021
    Publication date: December 2, 2021
    Inventors: Nicholas A. Polomoff, Jae Kyu Cho, Mohamed A. Rabie, Andreas D. Stricker
  • Patent number: 11145606
    Abstract: Structures for an optical fiber groove and methods of forming a structure for an optical fiber groove. A photonics chip includes a substrate and an interconnect structure over the substrate. The photonics chip has a first exterior corner, a second exterior corner, and a side edge extending from the first exterior corner to the second exterior corner. The substrate includes a groove positioned along the side edge between the first exterior corner and the second exterior corner. The groove is arranged to intersect the side edge at a groove corner, and the interconnect structure includes metal structures adjacent to the first groove corner. The metal structures extend diagonally in the interconnect structure relative to the side edge of the photonics chip.
    Type: Grant
    Filed: March 26, 2020
    Date of Patent: October 12, 2021
    Assignee: GLOBALFOUNDRIES U.S. INC.
    Inventors: Nicholas A. Polomoff, Jae Kyu Cho, Mohamed A. Rabie, Andreas D. Stricker
  • Publication number: 20210305172
    Abstract: Structures for an optical fiber groove and methods of forming a structure for an optical fiber groove. A photonics chip includes a substrate and an interconnect structure over the substrate. The photonics chip has a first exterior corner, a second exterior corner, and a side edge extending from the first exterior corner to the second exterior corner. The substrate includes a groove positioned along the side edge between the first exterior corner and the second exterior corner. The groove is arranged to intersect the side edge at a groove corner, and the interconnect structure includes metal structures adjacent to the first groove corner. The metal structures extend diagonally in the interconnect structure relative to the side edge of the photonics chip.
    Type: Application
    Filed: March 26, 2020
    Publication date: September 30, 2021
    Inventors: Nicholas A. Polomoff, Jae Kyu Cho, Mohamed A. Rabie, Andreas D. Stricker
  • Patent number: 9903727
    Abstract: A method for providing a geo-fence service using a map provided via a navigation device includes: searching for at least one critical route from a current position of a vehicle or an origin to a destination mapped onto the map; displaying a first critical route onto the map along the vehicle can travel to the destination, the first critical route corresponding to a shortest route among the at least one searched critical route; and determining whether the vehicle deviates from a geo-fence area including the at least one searched critical route.
    Type: Grant
    Filed: December 10, 2015
    Date of Patent: February 27, 2018
    Assignee: Hyundai Motor Company
    Inventors: Jae Kyu Cho, Nam Joon Kim
  • Publication number: 20170108346
    Abstract: A method for providing a geo-fence service using a map provided via a navigation device includes: searching for at least one critical route from a current position of a vehicle or an origin to a destination mapped onto the map; displaying a first critical route onto the map along the vehicle can travel to the destination, the first critical route corresponding to a shortest route among the at least one searched critical route; and determining whether the vehicle deviates from a geo-fence area including the at least one searched critical route.
    Type: Application
    Filed: December 10, 2015
    Publication date: April 20, 2017
    Inventors: Jae Kyu Cho, Nam Joon Kim