Abstract: Disclosed herein is an apparatus for hardware metering using a memory-type camouflaged cell. The apparatus includes memory including at least one camouflaged memory cell in which a key is hidden by a designer in advance and a controller for controlling whether to block the supply of power to the memory. The controller may perform reading a key from a corresponding key location in the multiple memory cells of the memory based on key location information stored in the controller when a key is input from the outside, determining whether the key input from the outside is the same as the key read from the memory, setting an authentic flag based on the determination result, and performing control based on the set authentic flag such that the memory operates normally or the supply of power is blocked.

Abstract: Provided are a new drug candidate discovery system and a computer program implementing a new drug candidate discovery platform. A new drug candidate discovery system may include an automatic data preprocessing module configured to receive a target protein information from a user through a web interface, and perform preprocessing on a protein structure file obtained based on the target protein information; a simulation setting module configured to predict an Enzymatically Active Pocket for Docking Calculation (EAPDC) from the protein structure file using an artificial intelligence language model, and determine a docking calculation site; and a docking simulation module configured to perform a docking simulation for the docking calculation site.

Abstract: There is provided a multilayer electronic component in which a short circuit between the internal electrodes, a decrease in capacitance, a decrease in breakdown voltage, and the like, may be suppressed by controlling an area fraction occupied by a region in which an intensity of brightness in a capacitance formation portion is 110% or more and 126% or less of an average value of an intensity of brightness of a cover portion.

Abstract: A multilayer electronic component according to another exemplary embodiment of the present disclosure may suppress occurrence of a short circuit between the internal electrodes, lower capacitance or reduced breakdown voltage by controlling an area fraction of a region of a capacitance formation portion, in which a range of brightness intensity is 110% or more and 126% or less compared to an average value of brightness intensity of a cover portion.

Abstract: There is provided a multilayer electronic component in which a short circuit between the internal electrodes, a decrease in capacitance, a decrease in breakdown voltage, and the like, may be suppressed by controlling an area fraction occupied by a region in which an intensity of brightness in a capacitance formation portion is 110% or more and 126% or less of an average value of an intensity of brightness of a cover portion.

Abstract: A multilayer electronic component according to an exemplary embodiment of the present disclosure may control connectivity of an end of an internal electrode, thereby suppressing occurrence of a short circuit between the internal electrodes, reduced capacitance or lower breakdown voltage.

Abstract: Controlling an area fraction of a region of a capacitance formation portion of a multilayer electronic component may suppress occurrence of a short circuit between internal electrodes disposed inside a body of the multilayer electronic component, lower capacitance or reduced breakdown voltage. A range of brightness intensity of the region of the capacitance formation portion of the multilayer electronic component is 110% or more and 126% or less compared to an average value of brightness intensity of a cover portion disposed on the capacitance formation portion.

Abstract: A multilayer electronic component includes: a body including a plurality of dielectric layers and a plurality of internal electrodes alternately disposed with the dielectric layers in a first direction, wherein when a space where the plurality of internal electrodes overlap each other in the first direction is defined as a capacitance forming portion, the plurality of internal electrodes include internal electrodes that are curved at end portions thereof in the capacitance forming portion and internal electrodes that are flat in the capacitance forming portion, and in a cross section of the body in the first and second directions.

Abstract: Disclosed herein is an apparatus for hardware metering using a memory-type camouflaged cell. The apparatus includes memory including at least one camouflaged memory cell in which a key is hidden by a designer in advance and a controller for controlling whether to block the supply of power to the memory. The controller may perform reading a key from a corresponding key location in the multiple memory cells of the memory based on key location information stored in the controller when a key is input from the outside, determining whether the key input from the outside is the same as the key read from the memory, setting an authentic flag based on the determination result, and performing control based on the set authentic flag such that the memory operates normally or the supply of power is blocked.

Abstract: A multilayer electronic component includes: a body including internal electrodes alternately disposed with dielectric layers in a first direction, wherein when a region in which the internal electrodes overlap each other in the first direction is a capacitance forming portion, the internal electrodes include internal electrodes that are curved at end portions thereof in the capacitance forming portion and internal electrodes that are flat in the capacitance forming portion, and in a cross-section of the body in the first and second directions, (F1+F2)/D1×100 is 35 or less, where F1 is a maximum distance from an uppermost internal electrode to an uppermost flat internal electrode in the first direction, F2 is a maximum distance from a lowermost internal electrode to a lowermost flat internal electrode in the first direction, and D1 is a size of the capacitance forming portion in the first direction at the center thereof in the second direction.

Abstract: A multilayer electronic component according to an exemplary embodiment of the present disclosure may control connectivity of an end of an internal electrode, thereby suppressing occurrence of a short circuit between the internal electrodes, reduced capacitance or lower breakdown voltage. The internal electrode may include a plurality of conductor portions and a plurality of cut-off portions.

Abstract: Disclosed herein is an apparatus for hardware metering using a memory-type camouflaged cell. The apparatus includes memory including at least one camouflaged memory cell in which a key is hidden by a designer in advance and a controller for controlling whether to block the supply of power to the memory. The controller may perform reading a key from a corresponding key location in the multiple memory cells of the memory based on key location information stored in the controller when a key is input from the outside, determining whether the key input from the outside is the same as the key read from the memory, setting an authentic flag based on the determination result, and performing control based on the set authentic flag such that the memory operates normally or the supply of power is blocked.

Abstract: Discussed is a welding quality inspection apparatus that can include a measurement unit including a first resistance measurement member to measure a first resistance value by directly contacting a first measurement point and a second resistance measurement member to measure a second resistance value by directly contacting a second measurement point; and a control unit to judge that a welding defect occurs and sorts a defective item when the first resistance value or the second resistance value obtained from the measurement unit exceeds a threshold resistance value. The first measurement point may be positioned on a first electrode terminal exposed to an outside of the secondary battery, and the second measurement point may be positioned on the welding portion of the first electrode current collector provided inside the secondary battery.

Abstract: A printed circuit board includes an insulating layer; a metal pad disposed on one side of the insulating layer; a via hole penetrating through the insulating layer to expose at least a portion of the metal pad; and a via filling at least a portion of the via hole, wherein the via comprises a first metal layer and a second metal layer disposed on the first metal layer, and an average size of grains in the first metal layer and an average size of grains in the second metal layer are different from each other.

Abstract: Example semiconductor devices and methods for fabricating a semiconductor device are disclosed. An example device may include a substrate, a first semiconductor pattern spaced apart from the substrate, a first antioxidant pattern extending along a bottom surface of the first semiconductor pattern and spaced apart from the substrate, and a field insulating film on the substrate. The insulating film may cover at least a part of a side wall of the first semiconductor pattern. The first antioxidant pattern may include a first semiconductor material film doped with a first impurity.

Abstract: A multilayer electronic component according to an exemplary embodiment of the present disclosure may control connectivity of an end of an internal electrode, thereby suppressing occurrence of a short circuit between the internal electrodes, reduced capacitance or lower breakdown voltage.

Abstract: A multilayer electronic component according to another exemplary embodiment of the present disclosure may suppress occurrence of a short circuit between the internal electrodes, lower capacitance or reduced breakdown voltage by controlling an area fraction of a region of a capacitance formation portion, in which a range of brightness intensity is 110% or more and 126% or less compared to an average value of brightness intensity of a cover portion.

Abstract: A multilayer electronic component includes: a body including a plurality of dielectric layers and a plurality of internal electrodes alternately disposed with the dielectric layers in a first direction, wherein when a space where the plurality of internal electrodes overlap each other in the first direction is defined as a capacitance forming portion, the plurality of internal electrodes include internal electrodes that are curved at end portions thereof in the capacitance forming portion and internal electrodes that are flat in the capacitance forming portion, and in a cross section of the body in the first and second directions.

Abstract: Disclosed herein is a memory-type camouflaged logic gate using transistors having different threshold voltages. The camouflaged logic gate may include two or more candidate logic gates, memory, the output signal of which is adjusted based on two or more transistors having different threshold voltages, and a multiplexer for selectively outputting the output of one of the two or more candidate logic gates depending on the output signal of the memory.

Abstract: Disclosed herein is an apparatus for hardware metering using a memory-type camouflaged cell. The apparatus includes memory including at least one camouflaged memory cell in which a key is hidden by a designer in advance and a controller for controlling whether to block the supply of power to the memory. The controller may perform reading a key from a corresponding key location in the multiple memory cells of the memory based on key location information stored in the controller when a key is input from the outside, determining whether the key input from the outside is the same as the key read from the memory, setting an authentic flag based on the determination result, and performing control based on the set authentic flag such that the memory operates normally or the supply of power is blocked.