Patents by Inventor Jae Seok AN

Jae Seok AN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11962937
    Abstract: Disclosed are an image processing method and device using a line-wise operation. The image processing device, according to one embodiment, comprises: a receiver for receiving an image; a first convolution operator for generating a feature map by performing a convolution operation on the basis of the image; and a compressor for compressing the feature map into units of at least one line; and a decompressor for reconstructing the feature map compressed into units of lines.
    Type: Grant
    Filed: December 26, 2022
    Date of Patent: April 16, 2024
    Assignee: Korea Advanced Institute of Science and Technology
    Inventors: Mun Churl Kim, Yong Woo Kim, Jae Seok Choi
  • Patent number: 11956569
    Abstract: Disclosed are an image processing method and device using a line-wise operation. The image processing device, according to one embodiment, comprises: a receiver for receiving an image; at least one first line buffer for outputting the image into a line-wise image line; a first convolution operator for generating a feature map by performing a convolution operation on the basis of the output from the first line buffer; and a feature map processor for storing the output from the first convolution operator in units of at least one line, and processing so as to output the feature map stored in units of at least one line into a two-dimensional form, wherein at least one convolution operation operates in the form of a pipeline.
    Type: Grant
    Filed: December 26, 2022
    Date of Patent: April 9, 2024
    Assignee: Korea Advanced Institute of Science and Technology
    Inventors: Mun Churl Kim, Yong Woo Kim, Jae Seok Choi
  • Patent number: 11953066
    Abstract: The present disclosure relates to a brake disc including a braking part having a circular plate shape having a hollow portion and a plurality of coupling portions protruding and extending from an inner diameter surface thereof, and a hat part disposed in the hollow portion and having a plurality of insertion portions protruding laterally, in which the plurality of coupling portions is respectively coupled to the plurality of insertion portions, and the coupling portion of the braking part and the insertion portion of the hat part are joined to only one of an outboard portion or an inboard portion of the braking part. According to the present disclosure, it is possible to reduce noise occurring at a position at which the hat part and the braking part are coupled to each other and improve cooling performance.
    Type: Grant
    Filed: April 1, 2022
    Date of Patent: April 9, 2024
    Assignees: HYUNDAI MOTOR COMPANY, KIA CORPORATION, SEOHAN INDUSTRY CO., LTD.
    Inventors: Yoon-Cheol Kim, Kyung-Rok Choi, Sang-Bum Koh, Seong-Kweon Joo, Ki-Jeong Kim, Jae-Seok Lee
  • Patent number: 11946125
    Abstract: A ferritic stainless steel with improved mechanical properties of weld zone is disclosed. The ferritic stainless steel includes, in percent (%) by weight of the entire composition, C: 0.005 to 0.02%, N: 0.005 to 0.02%, Cr: 11.0 to 13.0%, Ti: 0.16 to 0.3%, Nb: 0.1 to 0.3%, Al: 0.005 to 0.05%, the remainder of iron (Fe) and other inevitable impurities, and the ferritic stainless steel has a texture maximum strength of 30 or less in the {001} direction after welding.
    Type: Grant
    Filed: August 23, 2019
    Date of Patent: April 2, 2024
    Assignee: POSCO CO., LTD
    Inventors: Kye-Man Lee, Jae-Seok Park
  • Publication number: 20240107795
    Abstract: A substrate for a display, according to one embodiment, comprises: one surface; another surface which is the reverse of the one surface; a first area; and second areas, wherein the one surface is folded so as to face itself, the first area is defined as a folding area, and the second areas are defined as unfolding areas. The substrate for a display comprises a first layer, and a second layer which is disposed on the first layer, wherein the first area of the first layer comprises a plurality of first holes or first grooves, the first layer is an etch layer, and the second layer is an etch stopper layer.
    Type: Application
    Filed: December 4, 2023
    Publication date: March 28, 2024
    Inventors: Sung Won KANG, Jae Seok Park
  • Patent number: 11935703
    Abstract: A multilayer electronic component has a body and a non-conductive resin layer. The non-conductive resin layer includes a body cover portion disposed in a region of an external surface of the body in which an electrode layer of an external electrode is not disposed, and an extending portion extending from the body cover portion between the electrode layer and a conductive resin layer of the external electrode, to thereby suppress arc discharge, improve bending strength, and improve moisture resistance.
    Type: Grant
    Filed: January 9, 2023
    Date of Patent: March 19, 2024
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jae Seok Yi, Jung Min Kim, Bon Seok Koo, Chang Hak Choi, Il Ro Lee, Byung Woo Kang, San Kyeong, Hae Sol Kang
  • Patent number: 11935835
    Abstract: A semiconductor device and a method of manufacturing a semiconductor device, the device including gate structures on a substrate; source/drain layers on portions of the substrate that are adjacent the gate structures, respectively; first contact plugs contacting upper surfaces of the source/drain layers, respectively; a second contact plug contacting one of the gate structures, a sidewall of the second contact plug being covered by an insulating spacer; and a third contact plug commonly contacting an upper surface of at least one of the gate structures and at least one of the first contact plugs, at least a portion of a sidewall of the third contact plug not being covered by an insulating spacer.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: March 19, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyo-Jin Kim, Chang-Hwa Kim, Hwi-Chan Jun, Chul-Hong Park, Jae-Seok Yang, Kwan-Young Chun
  • Publication number: 20240077909
    Abstract: A display device according to an embodiment comprises: an elastic member; and at least one panel from among a display panel and a touch panel which are arranged on the elastic member, wherein the elastic member includes one surface and the other surface opposite to the one surface, the elastic member includes a first area and a second area, the first area is defined as a folding area, the second area is defined as an unfolding area, the elastic member has a plurality of first grooves arranged on the one surface in the first area thereof, and the panel is arranged on the other surface of the elastic member via an adhesive layer.
    Type: Application
    Filed: October 31, 2023
    Publication date: March 7, 2024
    Inventors: Sung Won KANG, Jae Seok PARK
  • Publication number: 20240063259
    Abstract: A semiconductor device is provided. The semiconductor device comprising a first fin pattern and a second fin pattern which are separated by a first isolation trench and extend in a first direction, a third fin pattern which is spaced apart from the first fin pattern in a second direction intersecting the first direction and extends in the first direction, a fourth fin pattern which is separated from the third fin pattern by a second isolation trench, a first gate structure which intersects the first fin pattern and has a portion extending along an upper surface of the first fin pattern, a second gate structure which intersects the second fin pattern and has a portion extending along an upper surface of the second fin pattern and a first element isolation structure which fills the second isolation trench and faces a short side of the first gate structure.
    Type: Application
    Filed: November 1, 2023
    Publication date: February 22, 2024
    Inventors: Young-Hun KIM, Jae Seok YANG, Hae Wang LEE
  • Publication number: 20240054606
    Abstract: A processor-implemented method includes: obtaining a plurality of image frames acquired for a scene within a predetermined time; determining loss values respectively corresponding to the plurality of image frames; determining a reference frame among the plurality of image frames based on the loss values; and generating a final image of the scene based on the reference frame.
    Type: Application
    Filed: June 20, 2023
    Publication date: February 15, 2024
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Geonseok SEO, Sehwan KI, Jae Seok CHOI, Insoo KIM, Hyong Euk LEE
  • Publication number: 20240026507
    Abstract: Disclosed is a ferritic stainless steel with reduced grain boundary erosion. A ferritic stainless steel with reduced grain boundary erosion according to an embodiment includes, in percent by weight (wt %), 0.005 to 0.1% of C, 0.01 to 1.0% of Si, 0.01 to 1.5% of Mn, 13 to 18% of Cr, 0.005 to 0.1% of N, 0.005 to 0.2% of Al, 0.005 to 0.1% of Ni, 0.003% or less of Mo, 0.05% or less of P, 0.005% or less of S, and the remainder being Fe and impurities, and satisfies an Acl, defined by Formula (1) below, of 900 or more and 990 or less: Ac1=36Cr+90Si+76Mo+760Al+350?(800C+1300N+150Ni+50Mn)??Formula (1): (wherein C, N, Si, Mn, Cr, Ni, Al, Mn, and Mo represent a content (wt %) of each element).
    Type: Application
    Filed: October 29, 2021
    Publication date: January 25, 2024
    Applicant: POSCO Co., Ltd
    Inventors: Soo-ho Park, Dong-hoon Kim, Jae-seok Park, Youngjun Kim
  • Patent number: 11877466
    Abstract: A substrate for a display, according to one embodiment, comprises: one surface; another surface which is the reverse of the one surface; a first area; and second areas, wherein the one surface is folded so as to face itself, the first area is defined as a folding area, and the second areas are defined as unfolding areas. The substrate for a display comprises a first layer, and a second layer which is disposed on the first layer, wherein the first area of the first layer comprises a plurality of first holes or first grooves, the first layer is an etch layer, and the second layer is an etch stopper layer.
    Type: Grant
    Filed: November 10, 2020
    Date of Patent: January 16, 2024
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Sung Won Kang, Jae Seok Park
  • Patent number: 11868691
    Abstract: An integrated circuit including a standard cell includes: a plurality of first wells extending in a first horizontal direction with a first width and of a first conductivity type; and a plurality of second wells extending in the first horizontal direction with a second width and having a second conductivity type, wherein the plurality of first wells and the plurality of second wells are alternately arranged in a second horizontal direction that is orthogonal to the first horizontal direction, and when m and n are integers greater than or equal to 3, the standard cell has a length in the second horizontal direction, the length being equal to a sum of m times a half of the first width and n times a half of the second width.
    Type: Grant
    Filed: September 14, 2022
    Date of Patent: January 9, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Raheel Azmat, Sidharth Rastogi, Chul-hong Park, Jae-seok Yang, Kwan-young Chun
  • Publication number: 20240006201
    Abstract: Systems and methods are described for integrated decomposition and scanning of a semiconducting wafer, where a single chamber is utilized for decomposition and scanning of the wafer of interest.
    Type: Application
    Filed: June 1, 2023
    Publication date: January 4, 2024
    Inventors: Tyler Yost, Daniel R. Wiederin, Beau A. Marth, Jared Kaser, Jonathan Hein, Jae Seok Lee, Jae Min Kim, Stephen H. Sudyka
  • Publication number: 20230406886
    Abstract: The present invention relates to coronavirus infectious disease COVID-19 therapeutic proteins CTP alpha, CTP beta, CTP gamma, CTP delta, and uses thereof. Compared to a known peptide (P6) which mimics the binding site of a receptor binding domain (RBD) of SARS-CoV and angiotensin-converting enzyme 2 (ACE2), the therapeutic proteins CTP alpha, CTP beta, CTP gamma, and CTP delta according to the present invention comprise a novel part obtained by adding a novel sequence of amino acids, wherein the interaction of atoms constituting the amino acids has been fundamentally designed in order to strengthen the binding of SARS-CoV2 to a novel epitope of RBD.
    Type: Application
    Filed: May 6, 2021
    Publication date: December 21, 2023
    Inventors: Iksoo CHANG, Mooseok KANG, Ae Ree LEE, Souk SEO, Woo Kyung YU, Wookbong KWON, Hee Yeon KIM, Song PARK, Seong Kyoon CHOI, Min Gi KIM, Sang Yeol KIM, Hyo Eun KIM, Ga Hee MIN, Seongjun PARK, Kyung Eun LEE, Juhwan LEE, Sang Ho JI, Min Jee CHOI, Jae Seok CHOI, Young-Ho LEE
  • Publication number: 20230402229
    Abstract: A multilayer capacitor includes a capacitor body including a dielectric layer and a plurality of internal electrodes, and external electrodes disposed on both ends of the capacitor body and connected to exposed portions of the plurality of internal electrodes, respectively. Each of the external electrodes includes a conductive layer disposed on the capacitor body to be connected to one or more of the plurality of internal electrodes, a conductive resin layer covering the conductive layer, and including a plurality of metal particles, a plurality of elastic fine powder particles each having an elastic powder particle and a metal film plated on a surface of the elastic powder particle, and a conductive resin surrounding the plurality of metal particles and the plurality of elastic fine powder particles and contacting the conductive layer, and a plating layer covering the conductive resin layer.
    Type: Application
    Filed: August 30, 2023
    Publication date: December 14, 2023
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: San Kyeong, Chang Hak Choi, Jae Seok Yi, Bon Seok Koo, Jung Min Kim, Hae Sol Kang, Jun Hyeon Kim
  • Patent number: 11841746
    Abstract: A display device according to an embodiment comprises: an elastic member; and at least one panel from among a display panel and a touch panel which are arranged on the elastic member, wherein the elastic member includes one surface and the other surface opposite to the one surface, the elastic member includes a first area and a second area, the first area is defined as a folding area, the second area is defined as an unfolding area, the elastic member has a plurality of first grooves arranged on the one surface in the first area thereof, and the panel is arranged on the other surface of the elastic member via an adhesive layer.
    Type: Grant
    Filed: December 16, 2020
    Date of Patent: December 12, 2023
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Sung Won Kang, Jae Seok Park
  • Publication number: 20230395406
    Abstract: Systems and methods are described for integrated decomposition and scanning of a semiconducting wafer, where a single chamber is utilized for decomposition and scanning of the wafer of interest.
    Type: Application
    Filed: May 19, 2023
    Publication date: December 7, 2023
    Inventors: Tyler Yost, Daniel R. Wiederin, Beau A. Marth, Jared Kaser, Jonathan Hein, Jae Seok Lee, Jae Min Kim, Stephen H. Sudyka
  • Publication number: 20230395384
    Abstract: Systems and methods for automatic sampling of a sample for the determination of chemical element concentrations and control of semiconductor processes are described. A system embodiment includes a remote sampling system configured to collect a sample of phosphoric acid at a first location, the remote sampling system including a remote valve having a holding loop coupled thereto; and an analysis system configured for positioning at a second location remote from the first location, the analysis system coupled to the remote valve via a transfer line, the analysis system including an analysis device configured to determine a concentration of one or more components of the sample of phosphoric acid and including a sample pump at the second location configured to introduce the sample from the holding loop into the transfer line for analysis by the analysis device.
    Type: Application
    Filed: June 6, 2023
    Publication date: December 7, 2023
    Inventors: Kyle W. Uhlmeyer, Jae Seok Lee, Daniel R. Wiederin, Patrick Sullivan
  • Publication number: 20230386749
    Abstract: A multilayer electronic component includes a body including a plurality of dielectric layers and internal electrodes, external electrodes disposed on the body to be connected to the internal electrodes, and a metal oxide disposed between the body and the external electrodes. The metal oxide includes calcium (Ca), zinc (Zn), and silicon (Si), and further includes at least one selected from the group consisting of barium (Ba), boron (B), and aluminum (Al).
    Type: Application
    Filed: October 19, 2022
    Publication date: November 30, 2023
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seon Ho PARK, Jae Seok YI, Moon Soo PARK, Chang Hak CHOI