Abstract: The present disclosure relates to a peritoneal cavity-bladder connecting catheter for ascites drainage. The peritoneal cavity-bladder connecting catheter for ascites drainage includes a peritoneal cavity position part positioned on the side of a peritoneal cavity by passing through a bladder wall located between the peritoneal cavity and a bladder, the peritoneal cavity position part having inlets through which ascites flow into an inner space and being formed as a film that surrounds the inner space, and a bladder position part integrally formed with the peritoneal cavity position part and positioned on the side of the bladder located on the side of the bladder wall opposite to the peritoneal cavity, the bladder position part having outlets through ascites flowed into the peritoneal cavity position part are discharged to outside, and being configured to form a closed inner space together with the peritoneal cavity position part.

Abstract: A touch display panel having a plurality of light emitting elements; a plurality of color filters formed at positions corresponding to the plurality of light emitting elements; and an infrared fluorescent pattern comprising a plurality of individual infrared fluorescent cell patterns formed at positions corresponding to at least some of the plurality of color filters; and an infrared control film positioned on a light emitting surface of the display panel.

Abstract: A glass article used as a cover glass of a flexible display device has values of indices consistent with results of a pen drop test and excellent impact resistance characteristics.

Abstract: A semiconductor chip includes a hardware performance monitor (HPM) unit and an HPM controller. The HPM unit is driven during an initial operation period, a first operation period, and a second operation period, outputs initial HPM data, first HPM data, and second HPM data in the initial operation period, the first operation period, and the second operation period, respectively. The HPM controller performs a first compensation operation of compensating a driving voltage of the semiconductor chip using the initial HPM data and the first HPM data, and a second compensation operation of compensating the driving voltage using the initial HPM data and the second HPM data. The HPM unit provides the initial HPM data, the first HPM data, and the second HPM data, which are correlated with performance of the semiconductor chip, to the HPM controller in a first mode, and does not provide this data in a second mode.

Abstract: A method of testing a semiconductor device includes: measuring minimum operating voltages of a plurality of semiconductor devices and operating frequencies of first and second ring oscillators included in the semiconductor devices, wherein the first ring oscillators have a first circuit configuration and the second ring oscillators have a second circuit configuration different from the first circuit configuration; generating a first model representing a correlation between operating frequencies of the first ring oscillators in the semiconductor devices and the minimum operating voltages of the semiconductor devices; generating a second model representing a correlation between operating frequencies of the second ring oscillators in the semiconductor devices and the minimum operating voltages of the semiconductor devices; measuring the operating frequencies of the first ring oscillators and the second ring oscillators included in a target semiconductor device; calculating a first measurement value using the ope

Abstract: A semiconductor chip includes a hardware performance monitor (HPM) unit and an HPM controller. The HPM unit is driven during an initial operation period, a first operation period, and a second operation period, outputs initial HPM data, first HPM data, and second HPM data in the initial operation period, the first operation period, and the second operation period, respectively. The HPM controller performs a first compensation operation of compensating a driving voltage of the semiconductor chip using the initial HPM data and the first HPM data, and a second compensation operation of compensating the driving voltage using the initial HPM data and the second HPM data. The HPM unit provides the initial HPM data, the first HPM data, and the second HPM data, which are correlated with performance of the semiconductor chip, to the HPM controller in a first mode, and does not provide this data in a second mode.